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參數(shù)資料
| 型號(hào)： | ADS1259EVM-PDK |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 13/48頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | KIT PERFORMANCE DEMO FOR ADS1259 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 14k |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 工作溫度： | -40°C ~ 125°C |
| 已用 IC / 零件： | ADS1259 |
| 已供物品： | 2 個(gè)板，文檔，軟件 |
| 其它名稱： | 296-30635 ADS1259EVM-PDK-ND |
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Clock
Detect
Internal
Oscillator
MUX
SystemClock
SEL
S0
S1
ENB
XTAL1/CLKIN
XTAL2
0
-
20
40
60
80
100
120
140
Magnitude(dB)
0
0.9
1.8
2.8
3.7
4.6
7.4
Frequency(MHz)
5.5
6.5
XTAL1/CLKIN
XTAL2
SBAS424D
– JUNE 2009 – REVISED AUGUST 2011
ALIASING
CLOCK SOURCE
The low-pass characteristic of the digital filter repeats
There are three ways to provide the ADS1259 clock:
at multiples of the modulator rate (fMOD = fCLK/8).
the internal oscillator, an external clock, or an
Figure 43 shows the responses plotted out to
external crystal/ceramic resonator. The ADS1259
7.3728MHz at the data rate of 14.4kSPS. Notice how
selects the clock source automatically. Figure 44
the responses near dc, 0.9216MHz, 1.8432MHz,
shows the clock select block. If either external clock
2.7698MHz, etc, are the same as given by f =
sources are present, the internal oscillator is disabled
NfMOD ± fDATA where N = 0, 1, 2, etc. The digital filter
and the external clock source is selected. If no
attenuates high-frequency noise on the ADS1259
external clock is present, the internal oscillator is
inputs up to the frequency where the response
selected. The ADS1259 continuously monitors the
repeats. However, noise or frequency components
clock source. The clock source can be polled by the
existing in the signal where the response repeats
EXTCLK bit (bit 6 of register CONFIG2), 0 = internal
alias into the passband. Often, a simple RC antialias
oscillator, 1 = external clock.
filter is sufficient to reject these input frequencies.
The data rate and corresponding filter notches scale
by the accuracy of clock frequency. Consideration
should be given to the clock accuracy and the
corresponding effect to the notch frequency locations.
Figure 44. Equivalent Circuitry of the Clock
Figure 43. Frequency Response to 7.3728MHz
Source
(Data Rate = 14400SPS)
Internal Oscillator
Figure 45 shows the internal oscillator connection.
XTAL1/CLKIN
is
grounded
and
XTAL2
is
not
connected (floating). The internal oscillator draws
approximately 40
μA from the DVDD supply. Note that
the
internal
oscillator
has
±2%
accuracy
over
temperature.
The
oscillator
accuracy
has
a
corresponding effect on line-cycle notch frequency
locations.
Figure 45. Internal Oscillator Connection
20
Copyright
2009–2011, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS1259EVM-PDK | 制造商:Texas Instruments 功能描述:DEVELOPMENT TOOL |
| ADS1259IPW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1259IPW | 制造商:Texas Instruments 功能描述:A/D CONVERTER (A-D) IC |
| ADS1259IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Noise 14kSPS 24B ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS1259QPWRQ1 | 功能描述:24 Bit Analog to Digital Converter 1 Input 1 Sigma-Delta 20-TSSOP 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 位數(shù):24 采樣率（每秒）:14k 輸入數(shù):1 輸入類型:差分，單端 數(shù)據(jù)接口:SPI 配置:ADC 無(wú)線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):三角積分 參考類型:外部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.7 V ~ 5.25 V 特性:PGA 工作溫度:-40°C ~ 105°C 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:20-TSSOP 標(biāo)準(zhǔn)包裝:1 |
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