I2C SERIAL CONTROL INTERFACE
參數(shù)資料
型號(hào)： ADN4604ASVZ-RL
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 17/40頁(yè)
文件大?。?/td> 0K
描述： IC CROSSPOINT SWIT 16X16 100TQFP
標(biāo)準(zhǔn)包裝： 1,000
系列： XStream™
功能： 交叉點(diǎn)開(kāi)關(guān)
電路： 1 x 16:16
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 3.6 V
電流 - 電源： 95mA
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
ADN4604
Data Sheet
Rev. A | Page 24 of 40
I2C SERIAL CONTROL INTERFACE
The ADN4604 register set is controlled through a 2-wire I2C
interface. The ADN4604 acts only as an I2C slave device. Therefore,
the I2C bus in the system needs to include an I2C master to
configure the ADN4604 and other I2C devices that may be on
the bus.
The ADN4604 I2C interface can be run in the standard
(100 kHz) and fast (400 kHz) modes. The SDA line only
changes value when the SCL pin is low with two exceptions. To
indicate the beginning or continuation of a transfer, the SDA
pin is driven low while the SCL pin is high; to indicate the end
of a transfer, the SDA line is driven high while the SCL line is
high. Therefore, it is important to control the SCL clock to
toggle only when the SDA line is stable unless indicating a start,
repeated start, or stop condition.
Table 17. I2C Device Address Assignment
ADDR1 Pin
ADDR0 Pin
I2C Device Address
0
0x90
0
1
0x92
1
0
0x94
1
0x96
RESET
On initial power-up, or at any point in operation, the ADN4604
register set can be restored to the default values by pulling the
RESET pin to low according to the specification in Table 2.
During normal operation, however, the RESET pin must be
pulled up to DVCC. A software reset is available by writing the
value 0x01 to the Reset register at Address 0x00. This register is
write only.
I2C DATA WRITE
To write data to the ADN4604 register set, a microcontroller,
or any other I2C master, must send the appropriate control
signals to the ADN4604 slave device. The steps to be followed
are listed below; the signals are controlled by the I2C master,
unless otherwise specified. A diagram of the procedure is
1.
Send a start condition (while holding the SCL line high,
pull the SDA line low).
2.
Send the ADN4604 part address (seven bits) whose upper
four bits are the static value b10010 and whose lower three
bits are controlled by the input pins I2C_A[1:0]. This
transfer should be MSB first.
3.
Send the write indicator bit (0).
4.
Wait for the ADN4604 to acknowledge the request.
5.
Send the register address (eight bits) to which data is to be
written. This transfer should be MSB first.
6.
Wait for the ADN4604 to acknowledge the request.
7.
Send the data (eight bits) to be written to the register
whose address was set in Step 5. This transfer should be
MSB first.
8.
Wait for the ADN4604 to acknowledge the request.
9.
Do one or more of the following:
a.
Send a stop condition (while holding the SCL line high,
pull the SDA line high) and release control of the bus.
b.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 2 of the write procedure to perform a write.
c.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 2 of this procedure to perform a read from
another address.
d.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 8 of the read procedure (in the I2C Data
Read section) to perform a read from the same
address set in Step 5.
The ADN4604 write process is shown in Figure 46. The SCL
signal is shown along with a general write operation and a
specific example. In the example, data 0x92 is written to
Address 0x6D of an ADN4604 part with a part address of 0x4B.
It is important to note that the SDA line only changes when the
SCL line is low, except for the case of sending a start, stop, or
repeated start condition, Step 1 and Step 9 in this case.
START
R/W ACK
ACK
STOP
DATA
ADDR
[1:0]
b10010
REGISTER ADDR
SCL
SDA
EXAMPLE
1
2
3
4
5
6
7
8
9a
07
93
4-
0
46
Figure 46. I2C Write Diagram
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