參數(shù)資料
型號(hào)： ADMC330
廠商： Analog Devices, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： Single Chip DSP（digital signal processing） Motor Controller(單片的數(shù)字信號(hào)處理馬達(dá)控制器)
中文描述： 單芯片DSP（數(shù)字信號(hào)處理）電機(jī)控制器（單片的數(shù)字信號(hào)處理馬達(dá)控制器）
文件頁數(shù)： 2/20頁
文件大?。?/td> 163K
代理商： ADMC330
–2–
REV. 0
ADMC330–SPECIFICATIONS
(V
DD
= 5 V
6
10%, GND = SGND = 0 V, T
A
= –40
8
C to +85
8
C, unless otherwse noted)
Parameter
Min
T yp
Max
Units
Conditions/Comments
ANALOG-T O-DIGIT AL CONVERT ER
Charging Capacitor = 1000 pF
2.5 kHz Sample Frequency
Signal Input
Resolution
Converter Linearity
Zero Offset
Channel-to-Channel Comparator Match
Comparator Delay
Current Source
Current Source Linearity
0.3
3.2
1
12
4
200
25
V
Bits
Bits
mV
mV
ns
μ
A
%
No Missing Codes
2
50
600
11
9.5
13.5
3
ELECT RICAL CHARACT ERIST ICS
V
IL
Logic Low
V
IH
Logic High
V
OL
Low-Level Output Voltage
V
OL
Low-Level Output Voltage (X T AL)
V
OH
High-Level Output Voltage
I
IL
Low-Level Input Current
I
IH
High-Level Input Current
I
DD
Supply Current (Power-Down Mode)
I
DD
Supply Current (Static)
0.8
V
V
V
V
V
μ
A
μ
A
mA
mA
2
0.4
0.5
I
OL
= 2 mA
I
OL
= 2 mA
I
OH
= 0.5 mA
V
IN
= 0 V
V
IN
= V
DD
4
–10
10
5
60
CLOCK
Input Clock (t
CK
)
DSP Clock (t
CK
/2)
100
50
ns
ns
10 MHz Clock Input (CLK IN)
20 MHz DSP Clock (CLK OUT )
REFERENCE VOLT AGE OUT PUT
Voltage Level
Output Voltage Change T
MIN
to T
MAX
2.2
2.55
20
2.9
V
mV
100
μ
A Load
12-BIT PWM T IMER
Counter Resolution
Edge Resolution
Programmable Deadtime Range
Programmable Deadtime Increments
Programmable Pulse Deletion Range
Programmable Pulse Deletion Increments
PWM Frequency Range
PWMSYNC Pulsewidth (T
CRST
)
Gate Drive Chop Frequency Range
12
2
Bits
ns
μ
s
ns
μ
s
ns
kHz
μ
s
MHz
100
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
10 MHz CLK IN
0
12.5
200
0
12.5
100
2.5
2
0.08
5
AUX ILIARY PWM T IMERS
Resolution
PWM Frequency
8
39
Bits
kHz
1/256 of 10 MHz CLK IN Clock
NOT ES
1
Signal input max V = 3.5 if V
DD
= 5 V
±
5%.
2
Resolution varies with PWM switching frequency (10 MHz Clock), 25 kHz = 8 bits, 2.5 kHz = 12 bits.
Specifications subject to change without notice.
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