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參數(shù)資料
| 型號(hào)： | ADM1028ARQZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 379K |
| 代理商： | ADM1028ARQZ-REEL7 |
REV. B
ADM1028
–15–
Table VII. Register 0x43 Interrupt Mask Register. Power-On Default <7:0> = 00h
Bit
Name
Read/Write
Description
0
Int Temp Error
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
1Flag 1 Mask
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
2Flag 2 Mask
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
3
Int
THERM
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
4
GPI Mask
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
5Ext Temp Error
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
6Ext
THERM
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
7Ext Diode Fault
Read/Write
A one disables the corresponding interrupt status bit for the
INT output.
Table VIII. Register 0x4B Remote Function Register. Power-On Default <7:0> = 00h
Bit
Name
Read/Write
Description
0
R_RST
Read/Write
Writing a “1” to this bit causes the
R_RST output to be pulsed low for a
minimum of 125
ms. This bit will self-clear to 0 when the R_RST pulse is
complete. Writing a “0” to this bit has no effect. Reading this bit reflects the
state of this register bit and not the state of the pin. The power-on default
value is “0.”
1
R_OFF
Read/Write
Writing a “1” to this bit causes the
R_OFF output to be driven high. This bit
will be cleared, and the output driven low, when
RST is asserted. Writing a
“0” to this bit has no effect. The power-on default value is “0.”
2Reserved
Read/Write
Reserved (Default = 0).
3Reserved
Read/Write
Reserved (Default = 0).
4Reserved
Read/Write
Reserved (Default = 0).
5Reserved
Read/Write
Reserved (Default = 0).
6Reserved
Read/Write
Reserved (Default = 0).
7Reserved
Read/Write
Reserved (Default = 0).
Table IX. Register 0x4C Alert Status Register. Power-On Default <7:0> = 00h
Bit
Name
Read/Write
Description
0Ext
THERM Alert
Read Only
A one indicates that the external thermal overload limit is currently exceeded.
1
GPI Alert
Read Only
This bit represents the logic level of the GPI pin if Bit 6 of the Configuration
Register is “0,” or the inverse logic level of the GPI pin if Bit 6 of the Con-
figuration Register is “1.”
2
Int
THERM Alert
Read Only
A one indicates that the internal thermal overload limit is currently exceeded.
3Reserved
Read Only
Undefined.
4Reserved
Read Only
Undefined.
5Reserved
Read Only
Undefined.
6Reserved
Read Only
Undefined.
7Reserved
Read Only
Undefined.
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