參數(shù)資料
型號: ADM1027ARQZ-RL7
廠商: ON Semiconductor
文件頁數(shù): 43/56頁
文件大?。?/td> 1822K
描述: IC REMOTE THERMAL CTLR 24QSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
Product Discontinuation Notice 25/Aug/2008
Product Obsolescence 30/Sept/2009
標準包裝: 1,000
系列: dBCool®
功能: 風(fēng)扇控制,溫度監(jiān)控器
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: 0°C ~ 105°C,外部傳感器
精確度: ±1°C
拓撲: ADC,比較器,風(fēng)扇速度計數(shù)器,多路復(fù)用器,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風(fēng)扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
REV. A
ADM1027
43
Table VIII. Current PWM Duty Cycle Registers (Power-On Default = 0xFF)
Register Address
R/W
Description
0x30
Read/Write
PWM1 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF)
0x31
Read/Write
PWM2 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF)
0x32
Read/Write
PWM3 Current Duty Cycle (0% to 100% duty cycle = 0x00 to 0xFF)
These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the ADM1027
reports the PWM duty cycles back through these registers. The PWM duty cycle values will vary according to temperature in
automatic fan speed control mode. During fan startup, these registers report back 0x00. In software mode, the PWM duty cycle
outputs can be set to any duty cycle value by writing to these registers.
Table IX. Register 0x40  Configuration Register 1 (Power-On Default = 0x00)
Bit
Name
R/W
Description
<0>
STRT
Read/Write
Logic 1 enables monitoring and PWM control outputs based on the limit settings pro-
grammed. Logic 0 disables monitoring and PWM control based on the default power-up
limit settings. Note that the limit values programmed are preserved even if a LOGIC 0 is
written to this bit and the default settings are enabled. This bit becomes read-only and
cannot be changed once Bit 1 (lock bit) has been written. All limit registers should be
programmed by BIOS before setting this bit to 1 (lockable).
<1>
LOCK
Write Once
Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable
registers become read-only and cannot be modified until the ADM1027 is powered down
and powered up again. This prevents rogue programs such as viruses from modifying
critical system limit settings (lockable).
<2>
RDY
Read-Only
This bit gets set to 1 by the ADM1027 to indicate that the device is fully powered up
and ready to begin systems monitoring.
<3>
FSPD
Read/Write
When set to 1, this runs all fans at full speed. Power-on default = 0. This bit does not get
locked at any time.
<4>
V ?/SPAN> I
Read/Write
BIOS should set this bit to 1 when the ADM1027 is configured to measure current
from an ADI ADOPT
?/DIV>
 VRM controller and measure the CPUs core voltage. This will
allow monitoring software to display CPU watts usage (lockable).
<5>
FSPDIS
Read/Write
Logic 1 disables fan spin-up for two TACH pulses. Instead, the PWM outputs will go
high for the entire fan spin-up timeout selected.
<6>
TODIS
Read/Write
When this bit is set to 1, the SMBus timeout feature is disabled. This allows the ADM1027
to be used with SMBus controllers that cannot handle SMBus timeouts (lockable).
<7>
V
CC
Read/Write
When this bit is set to 1, the ADM1027 rescales its V
CC
 pin to measure a 5 V supply.
If this bit is 0, the ADM1027 measures V
CC
 as a 3.3 V supply (lockable).
Rev. 2 | Page 3 of 56 | www.onsemi.com
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