- 您現在的位置：買賣IC網 > PDF目錄9093 > ADF4158CCPZ-RL7 (Analog Devices Inc)IC FRACTION N FREQ SYNT 24LFCSP PDF資料下載
參數資料
| 型號： | ADF4158CCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 35/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRACTION N FREQ SYNT 24LFCSP |
| 標準包裝： | 1,500 |
| 類型： | 分數 N 合成器（RF） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時鐘 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 6.1GHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 2.7 V ~ 3.3 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-WFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 24-LFCSP-WQ（4x4） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當前第35頁第36頁
ADF4158
Data Sheet
Rev. G | Page 8 of 36
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
1
CPGND
NOTES
1. THE LFCSP HAS AN EXPOSED PADDLE THAT MUST BE CONNECTED TO GND.
2
AGND
3
AGND
4
RFINB
5
RFINA
6
AVDD
15 DATA
16 LE
17 MUXOUT
18 SDVDD
14 CLK
13 CE
7
A
V
DD
8
A
V
DD
9
RE
F
IN
1
S
DG
ND
12
TX
D
AT
A
10
DG
ND
21
SW
2
22
V
P
23
R
SET
24
C
P
20
SW
1
19
DV
DD
ADF4158
TOP VIEW
(Not to Scale)
08728-
003
Figure 5. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
CPGND
Charge Pump Ground. This is the ground return path for the charge pump.
2, 3
AGND
Analog Ground. This is the ground return path of the prescaler.
4
RFINB
Complementary Input to the RF Prescaler. Decouple this point to the ground plane with a small bypass capacitor,
typically 100 pF.
5
RFINA
Input to the RF Prescaler. This small signal input is normally ac-coupled from the VCO.
6, 7, 8
AVDD
Positive Power Supply for the RF Section. Place decoupling capacitors to the digital ground plane as close as possible
to this pin. AVDD must have the same voltage as DVDD.
9
REFIN
Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and an equivalent input resistance of 100 kΩ.
It can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.
10
DGND
Digital Ground.
11
SDGND
Digital Σ-Δ Modulator Ground. Ground return path for the Σ-Δ modulator.
12
TXDATA
Tx Data Pin. Provide data to be transmitted in FSK or PSK mode on this pin.
13
CE
Chip Enable. A logic low on this pin powers down the device and puts the charge pump output into three-state mode.
14
CLK
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the shift
register on the CLK rising edge. This input is a high impedance CMOS input.
15
DATA
Serial Data Input. The serial data is loaded MSB first with the three LSBs being the control bits. This input is a high
impedance CMOS input.
16
LE
Load Enable, CMOS Input. When LE is high, the data stored in the shift registers is loaded into one of the eight latches,
with the latch being selected using the control bits.
17
MUXOUT
Multiplexer Output. This pin allows either the RF lock detect, the scaled RF, or the scaled reference frequency to be
accessed externally.
18
SDVDD
Power Supply Pin for the Digital Σ-Δ Modulator. This pin should be the same voltage as AVDD. Place decoupling
capacitors to the ground plane as close as possible to this pin.
19
DVDD
Positive Power Supply for the Digital Section. Place decoupling capacitors to the digital ground plane as close as
possible to this pin. DVDD must have the same voltage as AVDD.
20 , 21
SW1, SW2
Switches for Fast Lock.
22
VP
Charge Pump Power Supply. This should be greater than or equal to VDD. In systems where VDD is 3 V, it can be set to
5.5 V and used to drive a VCO with a tuning range of up to 5.5 V.
23
RSET
Connecting a resistor between this pin and ground sets the maximum charge pump output current. The relationship
between ICP and RSET is
SET
CPmax
R
I
5
.
25
=
where:
ICPmax = 5 mA.
RSET = 5.1 kΩ.
24
CP
Charge Pump Output. When enabled, this provides ±ICP to the external loop filter, which in turn drives the external VCO.
25
EPAD
Exposed Paddle. The LFCSP has an exposed paddle that must be connected to GND.
相關PDF資料 |
PDF描述 |
|---|---|
| X9409WV24-2.7T1 | IC XDCP QUAD 64-TAP 10K 24-TSSOP |
| X9409WS24T1 | IC XDCP QUAD 64-TAP 10K 24-SOIC |
| VE-B5Z-MU-S | CONVERTER MOD DC/DC 2V 80W |
| X9409WS24IT1 | IC XDCP QUAD 64-TAP 10K 24-SOIC |
| VE-B5Y-MU-S | CONVERTER MOD DC/DC 3.3V 132W |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADF4158WCCPZ | 功能描述:IC FRAC-N FREQ SYNTH 24LFCSP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):在售 類型:分數 N 合成器（RF） PLL:是 輸入:CMOS，TTL 輸出:時鐘 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/無 頻率 - 最大值:6.1GHz 分頻器/倍頻器:是/是 電壓 - 電源:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-WFQFN 裸露焊盤 供應商器件封裝:24-LFCSP-WQ（4x4） 標準包裝:1 |
| ADF4158WCCPZ-RL7 | 功能描述:IC FRAC-N FREQ SYNTH 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4159 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Direct Modulation/Fast Waveform Generating, 13 GHz, Fractional-N Frequency Synthesizer |
| ADF4159CCPZ | 制造商:Analog Devices 功能描述:Fractional-N Frequency Synthesizer 24-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:DIRECT MODULATION/FAST WAVEFORM GENERATING, 13 GHZ, FRACTION - Trays 制造商:Analog Devices 功能描述:IC PLL FREQ SYNTHESIZER 24LFCSP 制造商:Analog Devices Inc. 功能描述:Phase Locked Loops - PLL |
| ADF4159CCPZ-RL7 | 制造商:Analog Devices 功能描述:Fractional-N Frequency Synthesizer 24-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:13GHZ FAST RAMP DIRECT MOD FRAC N PLL - Tape and Reel 制造商:Analog Devices Inc. 功能描述:Phase Locked Loops - PLL |
發(fā)布緊急采購，3分鐘左右您將得到回復。