- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382831 > ADC1443D125HD (NXP Semiconductors N.V.) Dual channel 14-bit ADC; 125 Msps; JESD204B-compliant CGVxpress? serial outputs PDF資料下載
參數(shù)資料
| 型號(hào)： | ADC1443D125HD |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Dual channel 14-bit ADC; 125 Msps; JESD204B-compliant CGVxpress? serial outputs |
| 封裝： | ADC1443D125HD/C1<SOT935-2 (HLQFN56R)|<<http://www.nxp.com/packages/SOT935-2.html<1<Always Pb-free,; |
| 文件頁(yè)數(shù)： | 44/50頁(yè) |
| 文件大小： | 408K |
| 代理商： | ADC1443D125HD |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)當(dāng)前第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)
ADC1443D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 28 September 2011
44 of 50
NXP Semiconductors
ADC1443D series
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Table 57.
Default settings are shown highlighted.
Bit
Symbol
7 to 5
SWING_SPARE[2:0]
4 to 0
SWING[4:0]
IP_OUTBUF03_SWING register (address 086Ch) bit description
Access
R/W
R/W
Value
000
001**
Description
Table 58.
Default settings are shown highlighted.
Bit
Symbol
7 to 5
SWING_SPARE[2:0]
4 to 0
SWING[4:0]
IP_OUTBUF04_SWING register (address 086Dh) bit description
Access
R/W
R/W
Value
000
001**
Description
Table 59.
Default settings are shown highlighted.
Bit
Symbol
7 to 5
LANE_LATENCY[2:0]
4 to 3
LANE_MODE[1:0]
2
LANE_POL
1
LANE_CLK_POS_EDGE
0
LANE_PD
IP_LANE0_0_CTRL register (address 0871h) bit description
Access
R/W
R/W
R/W
R/W
R/W
Value
000
00
0
0
*
Description
Table 60.
Default settings are shown highlighted.
Bit
Symbol
7 to 5
LANE_LATENCY[2:0]
4 to 3
LANE_MODE[1:0]
2
LANE_POL
1
LANE_CLK_POS_EDGE
0
LANE_PD
IP_LANE1_0_CTRL register (address 0872h) bit description
Access
R/W
R/W
R/W
R/W
R/W
Value
000
00
0
0
*
Description
Table 61.
Default settings are shown highlighted.
Bit
Symbol
7 to 6
-
5 to 4
ADC_MODE[1:0]
3 to 1
-
0
ADC_PD
IP_ADCA_0_CTRL register (address 0890h) bit description
Access
-
R/W
-
R/W
Value
00
00
000
0
Description
not used
not used
Table 62.
Default settings are shown highlighted.
Bit
Symbol
7 to 6
-
5 to 4
ADC_MODE[1:0]
3 to 1
-
0
ADC_PD
IP_ADCB_0_CTRL register (address 0891h) bit description
Access
-
R/W
-
R/W
Value
00
00
000
0
Description
not used
not used
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC1443D125HD | Dual channel 14-bit ADC; 125 Msps; JESD204B-compliant CGVxpress? serial outputs |
| ADC1443D160HD | Dual channel 14-bit ADC; 160 Msps; JESD204B-compliant CGVxpress? serial outputs |
| ADC1443D200HD | Dual channel 14-bit ADC; 200 Msps; JESD204B-compliant CGVxpress? serial outputs |
| ADC1610S065HN | Single 16-bit ADC 65 Msps CMOS or LVDS DDR digital outputs |
| ADC1610S065HN | Single 16-bit ADC 65 Msps CMOS or LVDS DDR digital outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC1443D125W1-DB | 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits) |
| ADC1443D125W4-DB | 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits) |
| ADC1443D125WO-DB | 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits) |
| ADC1443D160HD-C1 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| ADC1443D160HD-C18 | 制造商:Integrated Device Technology Inc 功能描述:HLQFN56R - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。