參數(shù)資料
型號： ADC1443D125HD
廠商： NXP Semiconductors N.V.
元件分類： 外設(shè)及接口
英文描述： Dual channel 14-bit ADC; 125 Msps; JESD204B-compliant CGVxpress? serial outputs
封裝： ADC1443D125HD/C1<SOT935-2 (HLQFN56R)|<<http://www.nxp.com/packages/SOT935-2.html<1<Always Pb-free,;
文件頁數(shù)： 32/50頁
文件大?。?/td> 408K
代理商： ADC1443D125HD
ADC1443D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 28 September 2011
32 of 50
NXP Semiconductors
ADC1443D series
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Bits A12 to A0 indicate the address of the register being accessed. If it concerns a
multiple byte transfer, this address is the first register accessed. An address counter is
increased to access subsequent addresses.
The steps for a data transfer are:
1. Communication starts with the first rising edge on pin SCLK after a falling edge on pin
SCS_N.
2. The first phase is the transfer of the 2-byte instruction.
3. The second phase is the transfer of the data. Its length varies, but it is always a
multiple of 8 bits. The MSB is always sent first (for instruction and data bytes).
4. A rising edge on pin SCS_N indicates the end on data transmission.
Fig 37. SPI mode timing
SCS_N
SCLK
SDIO
R/W
W1
W0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D3
D2
D1
D0
D0
D7
D6
D5
D4
Instruction bytes
Register N (data)
Register N + 1 (data)
001aan743
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ADC1443D125W1-DB 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits)
ADC1443D125W4-DB 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits)
ADC1443D125WO-DB 制造商:Integrated Device Technology Inc 功能描述:BOARD - Boxed Product (Development Kits)
ADC1443D160HD-C1 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體:
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