參數(shù)資料
型號: ADATE305BSVZ
廠商: Analog Devices Inc
文件頁數(shù): 42/56頁
文件大?。?/td> 0K
描述: IC DCL ATE 250MHZ DUAL 100TQFP
標(biāo)準(zhǔn)包裝: 1
類型: DCL
應(yīng)用: 自動測試設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
ADATE305
Rev. 0 | Page 47 of 56
Step 2. Write to Register ADDR[4:0] = 0x0E (see Table 43).
Table 43.
Register
Bits
Setting
Comments
PMU State Register, ADDR[4:0] = 0x0E
DATA[9:8]
01
Set 2.5 V + DUTGND input selection
DATA[7]
X
DATA[6]
X
DATA[5]
X
DATA[4]
X
DATA[3]
1
Set to force current mode
DATA[2:0]
0XX
2 μA range has the minimum offset current
Step 3. Write to Register ADDR[4:0] = 0x0B (see Table 44).
Table 44.
Register
Bits
Setting
Comments
VIN 16-Bit DAC, ADDR[4:0] = 0x0B
DATA[15:0]
X
Update the VIN 16-Bit DAC register to the
desired value
Step 4. Write to Register ADDR[4:0] = 0x0E (see Table 45).
Table 45.
Register
Bits
Setting
Comments
PMU State Register, ADDR[4:0] = 0x0E
DATA[9:8]
1X
Set VIN input selection
DATA[7]
X
DATA[6]
X
DATA[5]
X
DATA[4]
X
DATA[3]
1
DATA[2:0]
XXX
Set to the desired current range
Transition from PMU Force Current Mode to PMU Force Voltage Mode
Step 1
. Table 46 lists the state of the registers in force current mode.
Table 46.
Register
Bits
Setting
PE/PMU Enable Register, ADDR[4:0] = 0x0C
DATA[2]
1
PMU State Register, ADDR[4:0] = 0x0E
DATA[9:8]
XX
DATA[7]
X
DATA[6]
X
DATA[5]
X
DATA[4]
X
DATA[3]
1
DATA[2:0]
XXX
Step 2
. Write to Register ADDR[4:0] = 0x0E (see Table 47).
Table 47.
Register
Bits
Setting
Comments
PMU State Register, ADDR[4:0] = 0x0E
DATA[9:8]
00
Set DUTGND input selection
DATA[7]
X
DATA[6]
X
DATA[5]
X
DATA[4]
X
DATA[3]
0
Set to force voltage mode
DATA[2:0]
XXX
Set to the desired current range
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