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| 型號： | ADATE304BBCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 36/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DCL ATE 200MHZ DUAL 84CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | DCL |
| 應(yīng)用： | 自動測試設(shè)備 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 84-TFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 84-CSPBGA（9x9） |
| 包裝： | 托盤 |
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ADATE304
Rev. 0 | Page 41 of 52
USER INFORMATION
POWER SUPPLY CONSIDERATIONS
Power Supply Sequencing
It is recommended that the power supplies be brought up in the
following order:
1.
Grounds (DGND, AGND, VREF_GND)
2.
VSS
3.
VCC, VCOMP_VTT, and VREF
4.
VDD
5.
VPLUS
If the HVOUT pin is not used, the VPLUS supply can be
connected to VDD.
Power Supply Decoupling
The ADATE304 is a high performance device that requires
close attention to power supply decoupling to deliver the best
performance. The use of full power planes with low inductance
capacitors placed as close to the power pins as possible is recom-
mended. The following power connections are the most important:
VPLUS to AGND (for the HVOUT driver)
VDD to VSS near the DUTx pin (for the driver)
VDD and VSS to AGND near the DUTx pin (for the
comparators)
VCC to DGND (for the digital)
Additionally, large bulk capacitors (that is, 10 μF) should be
used on every power supply on the printed circuit board (PCB).
TRUTH TABLES
Table 29. Driver and Load Truth Table1
Registers
Signals
Driver State
Load State
PE Disable
DATA[0]
ADDR[4:0] = 0x0C
Force VT
DATA[1]
ADDR[4:0] = 0x0C
Load Enable
DATA[1]
ADDR[4:0] = 0x0D
Driver High-Z/VT
DATA[0]
ADDR[4:0] = 0x0D
DATAx
RCVx
1
X
High-Z without clamps
Power-down
0
1
X
VT
Power-down
0
VL
Power-down
0
1
High-Z with clamps
Power-down
0
1
0
VH
Power-down
0
1
High-Z with clamps
Power-down
0
1
0
VL
Power-down
0
1
0
1
VT
Power-down
0
1
0
VH
Power-down
0
1
VT
Power-down
0
1
0
VL
Active off
0
1
0
1
High-Z with clamps
Active on
0
1
0
1
0
VH
Active off
0
1
0
1
High-Z with clamps
Active on
0
1
0
VL
Active on
0
1
0
1
High-Z with clamps
Active on
0
1
0
VH
Active on
0
1
High-Z with clamps
Active on
1 X means don’t care.
Table 30. HVOUT Truth Table1
HVOUT Mode Select
DATA[2]
ADDR[4:0] =0x0D
Channel 0
RCV
Channel 0
DATA
HVOUT Driver Output
1
X
VHH mode; VHH = (VT + 1 V) × 2 + DUTGND (Channel 0 VT DAC)
1
0
VL (Channel 0 VL DAC)
1
0
1
VH (Channel 0 VH DAC)
0
X
Disabled (HVOUT pin set to 0 V low impedance)
1 X means don’t care.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADATE305 | 制造商:AD 制造商全稱:Analog Devices 功能描述:250 MHz Dual Integrated DCL with Level Setting DACs, Per Pin PMU, and Per Chip VHH |
| ADATE305BSVZ | 功能描述:IC DCL ATE 250MHZ DUAL 100TQFP RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| ADATE306BBCZ | 制造商:Analog Devices 功能描述: |
| ADATE318 | 制造商:AD 制造商全稱:Analog Devices 功能描述:600 MHz Dual Integrated DCL with PPMU, VHH Drive Capability, Level Setting DACs, and On-Chip |
| ADATE318BCPZ | 制造商:Analog Devices 功能描述:600 MHZ DUAL INTEGRATED DCL WITH PPMU, VHH DRIVE CAPABILITY, - Trays |
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