參數(shù)資料
型號: ADATE304BBCZ
廠商: Analog Devices Inc
文件頁數(shù): 28/52頁
文件大?。?/td> 0K
描述: IC DCL ATE 200MHZ DUAL 84CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: DCL
應(yīng)用: 自動測試設(shè)備
安裝類型: 表面貼裝
封裝/外殼: 84-TFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 84-CSPBGA(9x9)
包裝: 托盤
ADATE304
Rev. 0 | Page 34 of 52
DEFINITION OF SPI WORD
The SPI can accept variable length words, depending on the
operation. At most, the word length equals 24 bits: 16 bits of
data, two channel selects, one read/write (R/W) selector, and a
5-bit address.
Depending on the operation, the data can be smaller or, in the
case of a read operation, nonexistent.
Table 18. Channel Selection
Channel 1
Channel 0
Channel Selected
0
NOP (no channel selected, no register
changes)
0
1
Channel 0 selected
1
0
Channel 1 selected
1
Channel 0 and Channel 1 selected
Table 19. R/W Definition
R/W
Description
0
Current register specified by address shifts out of
SDOUT on next shift operation
1
Current data written to the register specified by
address and channel select
Example 1: 16-Bit Write
Write 16 bits of data to a register or DAC; ignore unused MSBs. For example, Bit 15 and Bit 14 are ignored, and Bit 13 through Bit 0 are
applied to the 14-bit DAC.
07
279
-068
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
Figure 64. 16-Bit Write
Example 2: 14-Bit Write
Write 14 bits of data to the DAC.
9
-06
DATA[13:0]
CH[1:0]
R/W
ADDR[4:0]
07
279
Figure 65. 14-Bit Write
Example 3a: 2-Bit Write
Write two bits of data to the 2-bit register.
DATA[1:0]
CH[1:0]
R/W
ADDR[4:0]
07
27
9-
07
0
Figure 66. 2-Bit Write
Example 3b: 2-Bit Write
Write two bits of data to the 2-bit register. Bit 15 through Bit 2 are ignored and Bit 1 through Bit 0 are applied to the register.
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
07
279
-071
Figure 67. 2-Bit Write
Example 4: Read Request
Read request and follow with a second instruction (could be NOP) to clock out the data.
DATA[15:0]
CH[1:0]
R/W
ADDR[4:0]
CH[1:0]
R/W = 0
ADDR[4:0]
07
27
9-
072
Figure 68. Read Request
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