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參數(shù)資料
型號： AD9959BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 20/44頁
文件大?。?/td> 0K
描述： IC DDS QUAD 10BIT DAC 56LFCSP
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計資源： Phase Coherent FSK Modulator (CN0186)
標(biāo)準(zhǔn)包裝： 1
分辨率（位）： 10 b
主 fclk： 500MHz
調(diào)節(jié)字寬（位）： 32 b
電源電壓： 1.71 V ~ 1.96 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 56-LFCSP-VQ（8x8）
包裝： 托盤
產(chǎn)品目錄頁面： 552 (CN2011-ZH PDF)
AD9959
Rev. B | Page 27 of 44
05
24
6-
04
7
FTW0
SINGLE-TONE
MODE
LINEAR SWEEP MODE ENABLE—NO-DWELL BIT SET
FTW1
AA
A
B
BB
fOUT
TIME
P0 = 1
P0 = 0
P0 = 1
P0 = 0
Figure 38. Linear Sweep Mode (No-Dwell Enabled)
05
24
6-
0
48
FTW0
SINGLE-TONE
MODE
LINEAR SWEEP MODE
AT POINT A: LOAD RISING RAMP RATE REGISTER, APPLY RDW<31:0>
AT POINT B: LOAD FALLING RAMP RATE REGISTER, APPLY FDW<31:0>
P0 = 1
P0 = 0
TIME
FTW1
A
B
fOUT
Figure 39. Linear Sweep Mode (No-Dwell Disabled)
SWEEP AND PHASE ACCUMULATOR CLEARING
FUNCTIONS
The AD9959 allows two different clearing functions. The first
is a continuous zeroing of the sweep logic and phase accumula-
tor (clear and hold). The second is a clear and release or automatic
zeroing function. CFR[4] is the autoclear sweep accumulator bit
and CFR[2] is the autoclear phase accumulator bit. The continuous
clear bits are located in CFR, where CFR[3] clears the sweep
accumulator and CFR[1] clears the phase accumulator.
Continuous Clear Bits
The continuous clear bits are static control signals that, when
active high, hold the respective accumulator at 0 while the bit is
active. When the bit goes low, the respective accumulator is
allowed to operate.
Clear and Release Bits
The autoclear sweep accumulator bit, when set, clears and
releases the sweep accumulator upon an I/O update or a change
in the profile input pins. The autoclear phase accumulator bit,
when set, clears and releases the phase accumulator upon an
I/O update or a change in the profile pins. The automatic
clearing function is repeated for every subsequent I/O update or
change in profile pins until the clear and release bits are reset
via the serial port.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9959BCPZ1 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs
AD9959BCPZ-REEL7 功能描述:IC DDS QUAD 10BIT DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
AD9959BCPZ-REEL71 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 500 MSPS DDS with 10-Bit DACs
AD995PCBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC
AD9960BSTZ 功能描述:RFID應(yīng)答器 MxFE for RFID Reader Transceiver RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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