參數(shù)資料
型號: AD9958/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 20/44頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD9958
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計資源: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
Phase Coherent FSK Modulator (CN0186)
AD9958/59 Eval Brd Schematics
AD9958/59 Eval Brd Gerber Files
AD9958 Eval Brd BOM
標(biāo)準(zhǔn)包裝: 1
系列: AgileRF™
主要目的: 計時,直接數(shù)字合成(DDS)
嵌入式:
已用 IC / 零件: AD9958
主要屬性: 10 位數(shù)模轉(zhuǎn)換器,32 位調(diào)節(jié)字寬
次要屬性: 500MHz 2 通道圖形用戶界面
已供物品: 板,線纜,軟件
產(chǎn)品目錄頁面: 552 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: AD9958BCPZ-REEL7-ND - IC DDS DUAL 10BIT DAC 56LFCSP
AD9958BCPZ-ND - IC DDS DUAL 500MSPS DAC 56LFCSP
Data Sheet
AD9958
Rev. B | Page 27 of 44
Figure 38. Channel 0 in Linear Sweep Mode (No-Dwell Enabled)
Figure 39. Channel 0 in Linear Sweep Mode (No-Dwell Disabled)
SWEEP AND PHASE ACCUMULATOR CLEARING
FUNCTIONS
The AD9958 allows two different clearing functions. The first
is a continuous zeroing of the sweep logic and phase accumula-
tor (clear and hold). The second is a clear and release or automatic
zeroing function. CFR[4] is the autoclear sweep accumulator bit
and CFR[2] is the autoclear phase accumulator bit. The continuous
clear bits are located in CFR, where CFR[3] clears the sweep
accumulator and CFR[1] clears the phase accumulator.
Continuous Clear Bits
The continuous clear bits are static control signals that, when
active high, hold the respective accumulator at 0 while the bit is
active. When the bit goes low, the respective accumulator is
allowed to operate.
Clear and Release Bits
The autoclear sweep accumulator bit, when set, clears and
releases the sweep accumulator upon an I/O update or a change
in the profile input pins. The autoclear phase accumulator bit,
when set, clears and releases the phase accumulator upon an
I/O update or a change in the profile pins. The automatic
clearing function is repeated for every subsequent I/O update or
change in profile pins until the clear and release bits are reset
via the serial port.
FTW0
SINGLE-TONE
MODE
LINEAR SWEEP MODE ENABLE—NO-DWELL BIT SET
FTW1
AA
A
B
BB
fOUT
TIME
P2 = 1
P2 = 0
P2 = 1
P2 = 0
05
25
2-
1
47
FTW0
SINGLE-TONE
MODE
LINEAR SWEEP MODE
AT POINT A: LOAD RISING RAMP RATE REGISTER, APPLY RDW<31:0>
AT POINT B: LOAD FALLING RAMP RATE REGISTER, APPLY FDW<31:0>
P2 = 1
P2 = 0
TIME
FTW1
A
B
fOUT
05
25
2-
1
48
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