參數(shù)資料
型號(hào)： AD9923ABBCZRL
廠商： ANALOG DEVICES INC
元件分類(lèi)： 消費(fèi)家電
英文描述： CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA105
封裝： 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105
文件頁(yè)數(shù)： 9/88頁(yè)
文件大?。?/td> 852K
代理商： AD9923ABBCZRL
AD9923A
Pin No.
A8
A9
F11
E11
D11
C11
B11
C10
K6
F5
G5
G6
F1
G1
H3
H2
H1
J3
J2
J1
K3
K2
K1
L3
L2
D2
E2
C8
G10
E7
G9
C4
C5
F10
C6
C7
G11
H11
H10
F6
F7
E10
K11
J5
J7
J8
A11, E6, H9, J6, J9, J10, J11, K4, K7, L1, L6,
L9, L11, G2, G3
1
AI = analog input, AO = analog output, DI = digital input, DO = digital output, DIO = digital input/output, P = power, VO2 = Vertical Driver Output 2 level, VO3 =
Vertical Driver Output 3 level.
Rev. 0 | Page 9 of 88
Mnemonic
CLI
CLO
H1
H2
H3
H4
HL
RG
VSUB
MSHUT
STROBE
SUBCK
DCLK
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
VD
HD
V1
V2
V3
V4
V5A
V5B
V6
V7A
V7B
V8
V9
V10
V11
V12
V13
VDR_EN
TEST0
TEST1
TEST3
NC
Type
1
DI
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DIO
DIO
VO3
VO2
VO3
VO2
VO3
VO3
VO2
VO3
VO3
VO2
VO2
VO2
VO3
VO3
VO2
DI
DI
DI
DI
Description
Reference Clock Input (Master Clock).
Clock Output for Crystal.
CCD Horizontal Clock 1.
CCD Horizontal Clock 2.
CCD Horizontal Clock 3.
CCD Horizontal Clock 4.
CCD Last Horizontal Clock.
CCD Reset Gate Clock.
CCD Substrate Bias.
Mechanical Shutter Pulse.
Strobe Pulse.
CCD Substrate Clock (E Shutter).
Data Clock Output.
Data Output (LSB).
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output.
Data Output (MSB).
Vertical Sync Pulse. Input in slave mode, output in master mode.
Horizontal Sync Pulse. Input in slave mode, output in master mode.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
CCD Vertical Transfer Clock.
V-Driver Output Enable pin.
Test Input. Must be tied to VSS1 or VSS2.
Test Input. Must be tied to VSS1 or VSS2.
Test Input. Must be tied to VDD1 or VDD2.
No Connect.
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