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參數(shù)資料
| 型號： | AD9923ABBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processor with V-Driver and Precision Timing⑩ Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA105 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105 |
| 文件頁數(shù)： | 79/88頁 |
| 文件大小： | 852K |
| 代理商： | AD9923ABBCZRL |
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AD9923A
Address
(Hex)
F3
Rev. 0 | Page 79 of 88
Data
Bits
[21:0]
Default
Value
3FE000
Update Name
SCK
Description
Programmable polarities for V-outputs and XSUBCK during Standby 1,
Standby 2, or if OUTCONTROL = low.
[0] = XV1 polarity.
[1] = XV2 polarity.
[2] = XV3 polarity.
[3] = XV4 polarity.
[4] = XV5 polarity.
[5] = XV6 polarity.
[6] = XV7 polarity.
[7] = XV8 polarity.
[8] = XV9 polarity.
[9] = XV10 polarity.
[10] = XV11 polarity.
[11] = XV12 polarity.
[12] = XV13 polarity.
[13] = VSG1 polarity.
[14] = VSG2 polarity.
[15] = VSG3 polarity.
[16] = VSG4 polarity.
[17] = VSG5 polarity.
[18] = VSG6 polarity.
[19] = VSG7 polarity.
[20] = VSG8 polarity.
[21] = XSUBCK polarity.
STANDBY12POL
Table 54. Mode Register: VD Updated
Address (Binary)
12b10_xx_xxxx_xxxx
(Set A11, A10 = 10)
Data Bits
[37:0]
[37:35]
[34:30]
[29:25]
[24:20]
[19:15]
[14:10]
[9:5]
[4:0]
Default Value
0
Description
A11, A10 set to 10, remaining A9 to A0 bits used for D37:D28.
Number of fields (maximum of seven).
Selected field for Field 7.
Selected field for Field 6.
Selected field for Field 5.
Selected field for Field 4.
Selected field for Field 3.
Selected field for Field 2.
Selected field for Field 1.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD9923BBCZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
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