參數(shù)資料
型號(hào): AD9923ABBCZ
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA105
封裝: 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105
文件頁(yè)數(shù): 5/88頁(yè)
文件大?。?/td> 852K
代理商: AD9923ABBCZ
AD9923A
Parameter
VMM to VH
VH to VMM
VMM to VLL
Rise Time
VLL to VH
VLL to VMM
VMM to VH
Fall Time
VH to VLL
VH to VMM
VMM to VLL
Output Currents
@ 7.25 V
@ 0.25 V
@ +0.25 V
@ +14.75 V
R
ON
Rev. 0 | Page 5 of 88
Conditions/Comments
Symbol
t
PMH
t
PHM
t
PML
t
RLH
t
RLM
t
RMH
t
FHL
t
FHM
t
FML
Min
Typ
25
30
25
40
45
30
40
90
25
20
12
12
20
Max
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
Ω
V-DRIVER
INPUT
t
RLM
,
t
RMH
,
t
RLH
50%
10%
90%
t
PLM
,
t
PMH
,
t
PLH
V-DRIVER
OUTPUT
10%
50%
90%
t
FML
,
t
FHM
,
t
FHL
t
PML
,
t
PHM
,
t
PHL
0
Figure 2. Definition of V-Driver Timing Specifications
ANALOG SPECIFICATIONS
AVDD = 3.0 V, f
CLI
= 36 MHz, typical timing specifications, T
MIN
to T
MAX
, unless otherwise noted.
Table 5.
Parameter
CDS
Allowable CCD Reset Transient
CDS Gain Accuracy
3 dB CDS Gain
0 dB CDS Gain
+3 dB CDS Gain
+6 dB CDS Gain
Maximum Input Range Before Saturation
0 dB CDS Gain
3 dB CDS Gain
+6 dB CDS Gain
Maximum CCD Black Pixel Amplitude
0 dB CDS Gain (Default)
+6 dB CDS Gain
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Minimum Gain (VGA Code 15)
Maximum Gain (VGA Code 1023)
Conditions/Comments
Input characteristics definition
1
VGA gain = 6 dB (Code 15, default value)
Default
Default setting
Positive offset definition
1
Min
3
0
+3
+5.5
100
50
Typ
0.5
2.5
+0.5
+3.5
+6
1.0
1.4
0.5
1024
Guaranteed
6
42
Max
1.2
2
+1
+4
+6.5
+200
+100
Unit
V
dB
dB
dB
dB
V p-p
V p-p
V p-p
mV
mV
Steps
dB
dB
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