參數(shù)資料
型號(hào): AD9912ABCPZ
廠商: Analog Devices Inc
文件頁數(shù): 26/40頁
文件大小: 0K
描述: IC DDS 1GSPS DAC 14BIT 64LFCSP
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標(biāo)準(zhǔn)包裝: 1
分辨率(位): 14 b
主 fclk: 1GHz
調(diào)節(jié)字寬(位): 48 b
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
AD9912
Rev. F | Page 32 of 40
Addr
(Hex)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
(Hex)
Calibration (user-accessible trim)
0x0400
to
0x040A
Reserved
0x00
0x040B
DAC full-
scale
current
DAC full-scale current, Bits[7:0]
0xFF
0x040C
DAC full-scale current,
Bits[9:8]
0x01
0x040D
Reserved
0x00
0x040E
Reserved
0x10
0x040F
and
0x0410
Reserved
0x00
Harmonic spur reduction
0x0500
M
Spur A
HSR-A
enable
Amplitude
gain × 2
Spur A harmonic, Bits[3:0]
0x00
0x0501
M
Spur A magnitude, Bits[7:0]
0x00
0x0503
M
Spur A phase, Bits[7:0]
0x00
0x0504
M
Spur A
phase, Bit 8
0x00
0x0505
M
Spur B
HSR-B
enable
Amplitude
gain × 2
Spur B harmonic, Bits[3:0]
0x00
0x0506
M
Spur B magnitude, Bits[7:0]
0x00
0x0508
M
Spur B phase, Bits[7:0]
0x00
0x0509
M
Spur B
phase, Bit 8
0x00
1 Types of registers: M = mirrored (also called buffered). This type of register needs an I/O update for the new value to take effect; RO = read-only; AC = autoclear.
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