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參數(shù)資料
| 型號： | AD9879BSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR FRONT END 100MQFP |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 通道數(shù)： | 5 |
| 功率（瓦特）： | 587mW |
| 電壓 - 電源，模擬： | 3.3V |
| 電壓 - 電源，數(shù)字： | 3.3V |
| 封裝/外殼： | 100-BQFP |
| 供應商設備封裝： | 100-MQFP（14x20） |
| 包裝： | 托盤 |
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AD9879
Rev. A | Page 28 of 32
PCB DESIGN CONSIDERATIONS
Although the AD9879 is a mixed-signal device, the part should
be treated as an analog component. The on-chip digital
circuitry is specially designed to minimize the impact the digital
switching noise has on the operation of the analog circuits. The
power, grounding, and layout recommendations in this section
will help provide the best performance from the MxFE.
COMPONENT PLACEMENT
Chances for obtaining the best performance from the MxFE are
greatly increased if the three following guidelines of component
placement are followed.
Manage the path of return currents flowing into the
ground plane so that high frequency switching currents
from the digital circuits do not flow onto the ground plane
under the MxFE or analog circuits.
Keep noisy digital signal paths and sensitive receive signal
paths as short as possible.
Keep digital (noise generating) and analog (noise
susceptible) circuits as far away from each other as
possible.
To best manage the return currents, pure digital circuits that
generate high switching currents should be closest to the power
supply entry. This keeps the highest frequency return current
paths short and prevents them from traveling over the sensitive
MxFE and analog portions of the ground plane. Also, these
circuits should be generously bypassed at each device, further
reducing the high frequency ground currents. The MxFE
should be placed adjacent to the digital circuits, such that the
ground return currents from the digital sections do not flow
into the ground plane under the MxFE. The analog circuits
should be placed furthest from the power supply.
The AD9879 has several pins which are used to decouple
sensitive internal nodes. These pins are REFIO, REFB10,
REFT10, REFB12, and REFT12. The decoupling capacitors
connected to these points should have low ESR and ESL. These
capacitors should be placed as close as possible to the MxFE
and be connected directly to the analog ground plane.
The resistor connected to the FSADJ pin and the RC network
connected to the PLLFILT pin should also be placed close to the
device and connected directly to the analog ground plane.
POWER PLANES AND DECOUPLING
The AD9879 evaluation board demonstrates a good power
supply distribution and decoupling strategy. The board has four
layers: two signal layers, one ground plane, and one power
plane.
The power plane is split into a 3 VDD section which is used for
the 3 V digital logic circuits, a DVDD section that is used to
supply the digital supply pins of the AD9879, an AVDD section
that is used to supply the analog supply pins of the AD9879, and
a VANLG section that supplies the higher voltage analog
components on the board. The 3 VDD section typically has the
highest frequency currents on the power plane and should be
kept the furthest from the MxFE and analog sections of the
board.
The DVDD portion of the plane brings the current used to
power the digital portion of the MxFE to the device. This
should be treated similarly to the 3VDD power plane and be
kept from going underneath the MxFE or analog components.
The MxFE should sit above the AVDD portion of the power
plane.
The AVDD and DVDD power planes can be fed from the same
low noise voltage source. They should be decoupled from each
other, however, to prevent the noise generated in the DVDD
portion of the MxFE from corrupting the AVDD supply. This
can be done by using ferrite beads between the voltage source
and DVDD and between the source and AVDD. Both DVDD
and AVDD should have a low ESR, bulk decoupling capacitor
on the MxFE side of the ferrite as well as low ESR, low ESL de-
coupling capacitors on each supply pin (for example, the
AD9879 requires 17 power supply decoupling caps). The
decoupling caps should be placed as close as possible to the
MxFE supply pins. An example of the proper decoupling is
shown in the AD9875 evaluation board schematic.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9879BSZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9879-EB | 制造商:Analog Devices 功能描述:Evaluation Board For Mixed Signal Front End Set Top Box, Cable Modem 制造商:Analog Devices 功能描述:DEV TOOLS, MIXED SGNL FRONT END SET TOP , CBL MODEM - Bulk |
| AD9880 | 制造商:Analog Devices 功能描述:AUDIO PROCESSOR - Bulk |
| AD9880/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Analog/HDMI Dual Display Interface |
| AD9880/PCBZ | 功能描述:KIT EVALUATION AD9880 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
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