參數(shù)資料
型號： AD9847AKSTZRL
廠商： Analog Devices Inc
文件頁數(shù)： 17/28頁
文件大小： 0K
描述： IC CCD SIGNAL PROC 10BIT 48-LQFP
標(biāo)準(zhǔn)包裝： 2,000
類型： CCD 信號處理器，10 位
輸入類型： 邏輯
輸出類型： 邏輯
接口： 3 線串口
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
REV. A
AD9847
–24–
COLOR
STEERING
CONTROL
4:1
MUX
3
GAIN0
GAIN1
GAIN2
GAIN3
PxGA
PxGA STEERING
MODE
SELECTION
2
6
VD
HD
PxGA GAIN
REGISTERS
CONTROL
REGISTER
BITS D0–D2
SHP/SHD
VGA
CDS
Figure 17. PxGA Block Diagram
RGr
R
Gr
Gb
B
Gb
B
RGr
R
Gr
Gb
B
Gb
B
GAIN0, GAIN1, GAIN0, GAIN1...
LINE0
GAIN2, GAIN3, GAIN2, GAIN3...
LINE1
GAIN0, GAIN1, GAIN0, GAIN1...
LINE2
CCD: PROGRESSIVE BAYER
MOSAIC SEPARATE COLOR
STEERING MODE
Figure 18a. CCD Color Filter Example: Progressive Scan
RGr
R
Gr
RGr
R
Gr
RGr
R
Gr
RGr
R
Gr
GAIN0, GAIN1, GAIN0, GAIN1...
LINE0
GAIN0, GAIN1, GAIN0, GAIN1...
LINE1
GAIN0, GAIN1, GAIN0, GAIN1...
LINE2
CCD: INTERLACED BAYER
EVEN FIELD
VD SELECTED COLOR
STEERING MODE
Gb
B
Gb
B
Gb
B
Gb
B
Gb
B
Gb
B
Gb
B
Gb
B
GAIN2, GAIN3, GAIN2, GAIN3...
LINE0
GAIN2, GAIN3, GAIN2, GAIN3...
LINE1
GAIN2, GAIN3, GAIN2, GAIN3...
LINE2
ODD FIELD
Figure 18b. CCD Color Filter Example: Interlaced
The same Bayer pattern can also be interlaced, and the VD selected
mode should be used with this type of CCD (see Figure 18b).
The color steering performs the proper multiplexing of the R, G,
and B gain values (loaded into the PxGA gain registers) and is
synchronized by the user with vertical (VD) and horizontal (HD)
sync pulses. For more detailed information, see the PxGA Timing
section. The PxGA gain for each of the four channels varies from
–2 dB to +10 dB, controlled in 64 steps through the serial inter-
face. The PxGA gain curve is shown in Figure 19.
PxGA GAIN REGISTER CODE
10
32
PxGA
GAIN
–
dB
40
48
58
0
8
16
24
31
8
6
4
2
0
–2
(011111)
(100000)
Figure 19. PxGA Gain Curve
Variable Gain Amplifier
The VGA stage provides a gain range of 2 dB to 36 dB, program-
mable with 10-bit resolution through the serial digital interface.
Combined with 4 dB from the PxGA stage, the total gain range
for the AD9847 is 6 dB to 40 dB. The minimum gain of 6 dB is
needed to match a 1 V input signal with the ADC full-scale
range of 2 V. When compared to 1 V full-scale systems (such as
ADI’s AD9803), the equivalent gain range is 0 dB to 34 dB.
The VGA gain curve is divided into two separate regions. When
the VGA gain register code is between 0 and 511, the curve follows
a (1 + x)/(1 – x) shape, which is similar to a linear-in-dB character-
istic. From code 512 to code 1023, the curve follows a linear-in-dB
shape. The exact VGA gain can be calculated for any gain register
value by using the following two equations:
Code Range
Gain Equation (dB)
0–511
Gain = 20 log10 ([658
code] / [658 – code]) – 0.4
512–1023
Gain = (0.0354)(code) – 0.04
VGA GAIN REGISTER CODE
36
0
VGA
GAIN
–
dB
127
255
383
511
639
767
895
1023
30
24
18
12
6
0
Figure 20. VGA Gain Curve (Gain from PxGA Not Included)
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