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參數(shù)資料
| 型號(hào)： | AD9847 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
| 中文描述： | 10位40 MSPS的CCD信號(hào)處理器集成時(shí)序驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 22/28頁(yè) |
| 文件大?。?/td> | 428K |
| 代理商： | AD9847 |
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REV. A
AD9847
–22–
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2
0
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VD
NOTES
1. VD FALLING EDGE WILL RESET THE
PxGA
GAIN REGISTER STEERING TO “0101” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE
PxGA
GAIN REGISTER STEERING BETWEEN “0101” AND “2323” LINES.
3. FLD STATUS IS IGNORED.
HD
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1
0
X
X
PxGA
GAIN
REGISTER
FLD
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ODD FIELD
EVEN FIELD
0
2
2
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Figure 16a. Mosaic Separate Mode
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VD
NOTES
1. FLD FALLING EDGE (START OF ODD FIELD) WILL RESET THE
PxGA
GAIN REGISTER STEERING TO “0101” LINE.
2. FLD RISING EDGE (START OF EVEN FIELD) WILL RESET THE
PxGA
GAIN REGISTER STEERING TO “2323“ LINE.
3. HD FALLING EDGES WILL RESET THE
PxGA
GAIN REGISTER STEERING TO EITHER “0” (FLD = ODD) OR “2” (FLD = EVEN).
HD
1
1
0
X
X
PxGA
GAIN
REGISTER
FLD
0
ODD FIELD
EVEN FIELD
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3
3
2
2
2
0
Figure 16b. Mosaic Interlaced Mode
1
1
0
2
2
1
1
VD
NOTES
1. VD FALLING EDGE WILL RESET THE
PxGA
GAIN REGISTER STEERING TO “0101” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE
PxGA
GAIN REGISTER STEERING BETWEEN “0101” AND “1212” LINES.
3. ALL FIELDS WILL HAVE THE SAME
PxGA
GAIN STEERING PATTERN (FLD STATUS IS IGNORED).
HD
1
1
0
X
X
PxGA
GAIN
REGISTER
FLD
0
ODD FIELD
EVEN FIELD
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2
2
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1
1
0
0
0
0
Figure 16c. Mosaic Repeat Mode
0
2
0
1
0
0
1
VD
NOTES
1. EACH LINE FOLLOWS “012012” STEERING PATTERN.
2. VD AND HD FALLING EDGES WILL RESET THE
PxGA
GAIN REGISTER STEERING TO “0.”
3. FLD STATUS IS IGNORED.
HD
1
0
2
X
X
PxGA
GAIN
REGISTER
FLD
0
ODD FIELD
EVEN FIELD
2
0
2
0
1
0
0
1
1
0
2
0
2
0
Figure 16d. Three-Color Mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9847AKST | 10-Bit 40 MSPS CCD Signal Processor with Integrated Timing Driver |
| AD9848KST | CCD Signal Processors with Integrated Timing Driver |
| AD9848 | CCD Signal Processors with Integrated Timing Driver |
| AD9849 | CCD Signal Processors with Integrated Timing Driver |
| AD9849KST | CCD Signal Processors with Integrated Timing Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9847AKCPZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9847AKCPZRL | 制造商:Analog Devices 功能描述:DISPLAY DRVR, 10-BIT 40MSPS CCD SGNL PROCESSOR W/ INTEGRATED - Tape and Reel |
| AD9847AKST | 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Trays |
| AD9847AKSTRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 10-Bit 3.3V/5V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3V/3V/3.3V/3.3V/3.3V/3.3V/3.3V/5V/5V 48L - Tape and Reel |
| AD9847AKSTZ | 功能描述:IC CCD SIGNAL PROC 10BIT 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測(cè)器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
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