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參數(shù)資料
| 型號(hào)： | AD9760-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 10-Bit, 125 MSPS TxDAC D/A Converter |
| 中文描述： | 10位，125 MSPS的TxDAC系列D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 5/23頁 |
| 文件大?。?/td> | 412K |
| 代理商： | AD9760-EB |
AD9760
–
5
–
REV. B
PIN CONFIGURATION
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
28
27
26
25
24
23
22
21
NC = NO CONNECT
(MSB) DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
NC
NC
CLOCK
DVDD
DCOM
NC
AVDD
COMP2
I
OUTA
I
OUTB
ACOM
COMP1
FS ADJ
REFIO
REFLO
SLEEP
TOP VIEW
(Not to Scale)
AD9760
PIN FUNCTION DESCRIPTIONS
Pin No.
Name
Description
1
2–9
10
11–14, 25 NC
15
DB9
DB8–DB1
DB0
Most Significant Data Bit (MSB).
Data Bits 1–8.
Least Significant Data Bit (LSB).
No Internal Connection.
Power-Down Control Input. Active High. Contains active pull-down circuit, thus may be left unterminated if
not used.
Reference Ground when Internal 1.2 V Reference Used. Connect to AVDD to disable internal reference.
Reference Input/Output. Serves as reference input when internal reference disabled (i.e., Tie REFLO to
AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., Tie REFLO to ACOM).
Requires 0.1
μ
F capacitor to ACOM when internal reference activated.
Full-Scale Current Output Adjust.
Bandwidth/Noise Reduction Node. Add 0.1
μ
F to AVDD for optimum performance.
Analog Common.
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
DAC Current Output. Full-scale current when all data bits are 1s.
Internal Bias Node for Switch Driver Circuitry. Decouple to ACOM with 0.1
μ
F capacitor.
Analog Supply Voltage (+2.7 V to +5.5 V).
Digital Common.
Digital Supply Voltage (+2.7 V to +5.5 V).
Clock Input. Data latched on positive edge of clock.
SLEEP
16
17
REFLO
REFIO
18
19
20
21
22
23
24
26
27
28
FS ADJ
COMP1
ACOM
I
OUTB
I
OUTA
COMP2
AVDD
DCOM
DVDD
CLOCK
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PDF描述 |
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| AD9760AR | 10-Bit, 125 MSPS TxDAC D/A Converter |
| AD9760AR50 | 10-Bit, 125 MSPS TxDAC D/A Converter |
| AD9760ARU | 10-Bit, 125 MSPS TxDAC D/A Converter |
| AD9760* | Dual Synchronous 1.4A/800mA 4MHz Step-Down DC/DC Regulator; Package: DFN; No of Pins: 16; Temperature Range: -40°C to +125°C |
| AD9761-EB | Dual 10-Bit TxDAC+⑩ with 2x Interpolation Filters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9760-EBZ | 功能描述:BOARD EVAL FOR AD9760 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9761 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 10-Bit TxDAC+⑩ with 2x Interpolation Filters |
| AD9761ARS | 功能描述:IC DAC 10BIT DUAL 40MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD9761-ARS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit Digital-to-Analog Converter |
| AD9761ARSRL | 功能描述:IC DAC 10BIT DUAL 40MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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