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參數(shù)資料
| 型號(hào)： | AD9760-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 10-Bit, 125 MSPS TxDAC D/A Converter |
| 中文描述： | 10位，125 MSPS的TxDAC系列D / A轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 2/23頁(yè) |
| 文件大?。?/td> | 412K |
| 代理商： | AD9760-EB |
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DC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
RESOLUTION
DC ACCURACY
1
Integral Linearity Error (INL)
Differential Nonlinearity (DNL)
MONOTONICITY
ANALOG OUTPUT
Offset Error
Gain Error
(Without Internal Reference)
Gain Error
(With Internal Reference)
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
10
Bits
–1.0
–0.5
Guaranteed Over Specified Temperature Range
±
0.5
±
0.25
+1.0
+0.5
LSB
LSB
–0.025
–10
–10
2.0
–1.0
+0.025
+10
+10
20.0
1.25
% of FSR
% of FSR
% of FSR
mA
V
k
pF
±
2
±
1
100
5
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
1.08
1.20
100
1.32
V
nA
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance
Small Signal Bandwidth (w/o C
COMP1
)
4
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift
(Without Internal Reference)
Gain Drift
(With Internal Reference)
Reference Voltage Drift
0.1
1.25
V
M
MHz
1
1.4
0
±
50
±
100
±
50
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm of FSR/
°
C
ppm/
°
C
POWER SUPPLY
Supply Voltages
AVDD
5
DVDD
Analog Supply Current (I
AVDD
)
Digital Supply Current (I
DVDD
)
6
Supply Current Sleep Mode (I
AVDD
)
Power Dissipation
6
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
7
(5 V, I
OUTFS
= 20 mA)
Power Dissipation
7
(3 V, I
OUTFS
= 2 mA)
Power Supply Rejection Ratio—AVDD
Power Supply Rejection Ratio—DVDD
2.7
2.7
5.0
5.0
25
3
5.5
5.5
30
5
8.5
175
V
V
mA
mA
mA
mW
mW
mW
% of FSR/V
% of FSR/V
°
C
140
190
45
–0.04
–0.025
+0.04
+0.025
OPERATING RANGE
–40
+85
NOTES
1
Measured at I
OUTA
, driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32
×
the I
REF
current.
3
Use an external buffer amplifier to drive any external load.
4
Reference bandwidth is a function of external cap at COMP1 pin and signal level. Refer to Figure 41.
5
For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.
6
Measured at f
CLOCK
= 50 MSPS and f
OUT
= 1.0 MHz.
7
Measured as unbuffered voltage output into 50
R
LOAD
at I
OUTA
and I
OUTB
, f
CLOCK
= 100 MSPS and f
OUT
= 40 MHz.
Specifications subject to change without notice.
(T
MIN
to T
MAX
, AVDD = +5 V, DVDD = +5 V, I
OUTFS
= 20 mA, unless otherwise noted)
–2–
REV. B
AD9760/AD9760-50–SPECIFICATIONS
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| AD9760* | Dual Synchronous 1.4A/800mA 4MHz Step-Down DC/DC Regulator; Package: DFN; No of Pins: 16; Temperature Range: -40°C to +125°C |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9760-EBZ | 功能描述:BOARD EVAL FOR AD9760 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9761 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 10-Bit TxDAC+⑩ with 2x Interpolation Filters |
| AD9761ARS | 功能描述:IC DAC 10BIT DUAL 40MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD9761-ARS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-Bit Digital-to-Analog Converter |
| AD9761ARSRL | 功能描述:IC DAC 10BIT DUAL 40MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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