參數(shù)資料
型號: AD9643BCPZ-210
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 2-CH 14-BIT FLASH METHOD ADC, PARALLEL ACCESS, QCC64
封裝: 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64
文件頁數(shù): 23/36頁
文件大?。?/td> 1659K
代理商: AD9643BCPZ-210
AD9643
Rev. A | Page 3 of 36
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = 1.0 dBFS differential input, 1.75 V p-p full-scale input range,
duty cycle stabilizer (DCS) enabled, unless otherwise noted.
Table 1.
AD9643-170
AD9643-210
AD9643-250
Parameter
Temperature
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
Full
14
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
±10
mV
Gain Error
Full
+2/6
+3/5
±4
%FSR
Differential Nonlinearity (DNL)
Full
±0.75
LSB
25°C
±0.25
LSB
Integral Nonlinearity (INL)1
Full
±1.8
±2
±3.5
LSB
25°C
±1.5
LSB
MATCHING CHARACTERISTIC
Offset Error
Full
±13
mV
Gain Error
Full
±2.5/
+3.5
2/
+3.5
2.5/
+3.5
%FSR
TEMPERATURE DRIFT
Offset Error
Full
±15
ppm/°C
Gain Error
Full
±50
ppm/°C
INPUT REFERRED NOISE
VREF = 1.0 V
25°C
1.33
LSB rms
ANALOG INPUT
Input Span
Full
1.75
V p-p
Input Capacitance2
Full
2.5
pF
Full
20
Input Common-Mode Voltage
Full
0.9
V
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
Supply Current
IAVDD1
Full
196
250
217
265
256
275
mA
IDRVDD1
Full
145
160
185
180
210
mA
POWER CONSUMPTION
Sine Wave Input (DRVDD = 1.8 V)
Full
614
680
785
mW
Standby Power4
Full
90
mW
Power-Down Power
Full
10
mW
1 Measured with a low input frequency, full-scale sine wave.
2 Input capacitance refers to the effective capacitance between one differential input pin and its complement.
3 Input resistance refers to the effective resistance between one differential input pin and its complement.
4 Standby power is measured with a dc input and the CLK pin inactive (that is, set to AVDD or AGND).
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