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參數資料
| 型號： | AD9522-5BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 70/76頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN 2.4GHZ 64LFCSP |
| 標準包裝： | 750 |
| 類型： | 時鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:12，2:24 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.4GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
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AD9522-5
Rev. 0 | Page 72 of 76
Table 52. Update All Registers
Reg.
Addr
(Hex) Bit(s) Name
Description
232
[0]
IO_UPDATE
This bit must be set to 1 to transfer the contents of the buffer registers into the active registers. This happens
on the next SCLK rising edge. This bit is self-clearing; that is, it does not need to be set back to 0.
[0] = 1 (self-clearing); update all active registers to the contents of the buffer registers.
Table 53. EEPROM Buffer Segment
Reg.
Addr
(Hex) Bit(s) Name
Description
A00 to
A16
[7:0] EEPROM Buffer
Segment Register 1
to EEPROM Buffer
Segment Register 23
The EEPROM buffer segment section stores the starting address and number of bytes that are to be
stored and read back to and from the EEPROM. Because the AD9522 register space is noncontiguous,
the EEPROM controller needs to know the starting address and number of bytes in the AD9522 register
space to store and retrieve from the EEPROM. In addition, there are special instructions for the EEPROM
controller, operational codes (that is, IO_UPDATE and end-of-data) that are also stored in the EEPROM
buffer segment. The on-chip default setting of the EEPROM buffer segment registers is designed such
that all registers are transferred to/from the EEPROM, and an IO_UPDATE is issued after transfer. See the
Programming the EEPROM Buffer Segment section for more information.
Table 54. EEPROM Control
Reg.
Addr
(Hex) Bit(s) Name
Description
B00
[0]
STATUS_EEPROM
(read-only)
This read-only register indicates the status of the data transferred between the EEPROM and the buffer
register bank during the writing and reading of the EEPROM. This signal is also available at the STATUS pin
when 0x01D[7] is set.
[0] = 0; data transfer is done.
[0] = 1; data transfer is not done.
B01
[0]
EEPROM
data error
(read-only)
This read-only register indicates an error during the data transferred between the EEPROM and the buffer.
[0] = 0; no error. Data is correct.
[0] = 1; incorrect data detected.
B02
[1]
Soft_EEPROM
When the EEPROM pin is tied low, setting Soft_EEPROM resets the AD9522 using the settings saved
in EEPROM.
[1] = 1; soft reset with EEPROM settings (self-clearing). This bit self-clears on the next serial port clock
cycle after the completion of writing to this register.
B02
[0]
Enable EEPROM
write
Enables the user to write to the EEPROM.
[0] = 0; EEPROM write protection is enabled. User cannot write to EEPROM (default).
[0] = 1; EEPROM write protection is disabled. User can write to EEPROM.
B03
[0]
REG2EEPROM
Transfers data from the buffer register to the EEPROM (self-clearing).
[0] = 1; setting this bit initiates the data transfer from the buffer register to the EEPROM (writing process);
it is reset by the IC master after the data transfer is done.
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