參數(shù)資料
型號(hào): AD9520-5BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 48/76頁(yè)
文件大小: 0K
描述: IC CLOCK GEN EXT VCO 64-LFCSP
設(shè)計(jì)資源: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
Phase Coherent FSK Modulator (CN0186)
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:12,2:24
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.4GHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 776 (CN2011-ZH PDF)
AD9520-5
Data Sheet
Rev. A | Page 52 of 76
EEPROM OPERATIONS
The AD9520 contains an internal EEPROM (nonvolatile memory).
The EEPROM can be programmed by users to create and store
a user-defined register setting file when the power is off. This
setting file can be used for power-up and chip reset as a default
setting. The EEPROM size is 512 bytes.
Note that to guarantee proper loading of the EEPROM during
startup, a high-low-high pulse on the RESET pin should occur
after the power supply has stabilized.
During the data transfer process, the write and read registers via
the serial port are generally not available except for one readback
register, STATUS_EEPROM.
To determine the data transfer state through the serial port in
SPI mode, users can read the value of STATUS_EEPROM
(1b = in process; 0b = completed).
In IC mode, the user can address the AD9520 slave port with
the external IC master (send an address byte to the AD9520).
If the AD9520 responds with a no acknowledge bit, the data
transfer process does not take place. If AD9520 responds with an
acknowledge bit, the data transfer process is completed. The
user can monitor the STATUS_EEPROM register or program
the STATUS pin to monitor the status of the data transfer.
WRITING TO THE EEPROM
The EEPROM cannot be programmed directly through the serial
port interface. To program the EEPROM and store a register
setting file, do the following:
1. Program the AD9520-5-2 registers to the desired circuit state.
2. Program the EEPROM buffer registers, if necessary (see
This step is necessary only if the user wants to use the
EEPROM to control the default setting of some (but not all)
of the AD9520 registers or to control the register setting
update sequence during power-up or chip reset.
3. Set the enable EEPROM write bit (Register 0xB02[0]) to 1b
to enable the EEPROM.
4. Set the REG2EEPROM bit (Register 0xB03[0]) to 1b.
5. Set the IO_UPDATE bit (Register 0x232[0]) to 1b, which
starts the process of writing data into the EEPROM to
create the EEPROM setting file. This enables the AD9520
EEPROM controller to transfer the current register values,
as well as the memory address and instruction bytes from the
EEPROM buffer segment, into the EEPROM. After the
write process is completed, the internal controller sets
Register 0xB03[0] (REG2EEPROM) back to 0b.
The STATUS_EEPROM bit in the readback register
(Register 0xB00[0]) is used to indicate the data transfer
status between the EEPROM and the control registers
(0b = complete/inactive; 1b = in process/active). At the start
of the data transfer, STATUS_EEPROM is set to 1b by the
EEPROM controller and cleared to 0b at the end of the
data transfer.
The STATUS_EEPROM bit can be accessed through the
STATUS pin when the STATUS pin is programmed to
monitor the STATUS_EEPROM bit. Alternatively, the user
can monitor the STATUS_EEPROM bit directly by reading
the register.
6. When the data transfer process is done (Register 0xB00[0] =
0b), set the enable EEPROM write bit (Register 0xB02[0])
to 0b to disable writing to the EEPROM.
To verify that the data transfer has completed correctly, ensure
that Register 0xB01[0] = 0b. A value of 1b in this register indicates
a data transfer error. When an EEPROM save/load transfer is
complete, wait a minimum of 10 s before starting the next
EEPROM save/load transfer.
READING FROM THE EEPROM
The following reset-related events can start the process of
restoring the settings stored in EEPROM to control registers.
When the EEPROM pin is set high, do any of the following:
Power up the AD9520.
Perform a hardware chip reset by pulling the RESET pin
low and then releasing RESET.
Set the self-clearing soft reset bit (Register 0x000[5]) to 1b.
When the EEPROM pin is set low, set the self-clearing
SOFT_EEPROM bit (Register 0xB02[1]) to 1b. The AD9520
then starts to read the EEPROM and loads the values into the
active registers.
If the EEPROM pin is low during reset or power-up, the
EEPROM is not active, and the AD9520 default values are
loaded instead.
To verify that the data transfer has completed correctly, verify
that Register 0xB01[0] = 0b. A value of 1b in this register indicates
a data transfer error. When an EEPROM save/load transfer is
complete, wait a minimum of 10 s before starting the next
EEPROM save/load transfer.
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