參數(shù)資料
型號(hào): AD9517-4A/PCBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 55/80頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD9517-4A
設(shè)計(jì)資源: High Performance, Dual Channel IF Sampling Receiver (CN0140)
AD9517 Eval Brd Schematics
AD9517 Gerber Files
AD9517-4 BOM
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),時(shí)鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9517-4A
主要屬性: 2 輸入,12 輸出,1.6GHz VCO
次要屬性: CMOS,LVPECL 和 LVDS 兼容
已供物品:
Data Sheet
AD9517-4
Rev. E | Page 59 of 80
CONTROL REGISTER MAP DESCRIPTIONS
Table 53 through Table 62 provide a detailed description of each of the control register functions. The registers are listed by hexadecimal
address. A range of bits (for example, from Bit 5 through Bit 2) is indicated using a colon and brackets, as follows: [5:2].
Table 53. Serial Port Configuration and Part ID
Reg.
Addr
(Hex)
Bits
Name
Description
0x000
[7:4]
Mirrored, Bits[3:0]
Bits[7:4] should always mirror Bits[3:0] so that it does not matter whether the part
is in MSB or LSB first mode (see Bit 1, Register 0x000). The user should set the bits as follows:
Bit 7 = Bit 0.
Bit 6 = Bit 1.
Bit 5 = Bit 2.
Bit 4 = Bit 3.
3
Long instruction
Short/long instruction mode. This part uses long instruction mode only, so this bit should
always be set to 1b.
0: 8-bit instruction (short).
1: 16-bit instruction (long) (default).
2
Soft reset
Soft reset.
1: soft reset; restores default values to internal registers. Not self-clearing. Must be cleared to
0b to complete reset operation.
1
LSB first
MSB or LSB data orientation.
0: data-oriented MSB first; addressing decrements (default).
1: data-oriented LSB first; addressing increments.
0
SDO active
Selects unidirectional or bidirectional data transfer mode.
0: SDIO pin used for write and read; SDO set to high impedance; bidirectional mode (default).
1: SDO used for read, SDIO used for write; unidirectional mode.
0x003
[7:0]
Part ID (read only)
Uniquely identifies the dash version (-0 through -4) of the AD9517
AD9517-0: 0x11
AD9517-1: 0x51
AD9517-2: 0x91
AD9517-3: 0x53
AD9517-4: 0xD3
0x004
0
Read back active registers
Selects register bank used for a readback.
0: reads back buffer registers (default).
1: reads back active registers.
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