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參數(shù)資料
| 型號(hào)： | AD9516-5/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 71/76頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9516-5 2.5GHZ |
| 產(chǎn)品培訓(xùn)模塊： | Active Filter Design Tools |
| 設(shè)計(jì)資源： | AD9516 Eval Brd Schematic AD9516 Gerber Files AD9516-5 BOM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計(jì)時(shí)，時(shí)鐘發(fā)生器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9516-5 |
| 主要屬性： | 2 輸入，14 輸出 |
| 次要屬性： | CMOS、LVDS、LVPECL 輸出邏輯，ADIsimCLK&trade 圖形用戶(hù)界面 |
| 已供物品： | 板，線纜，CD，電源 |
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AD9516-5
Rev. A | Page 73 of 76
CMOS
10
60.4
(1.0 INCH)
MICROSTRIP
07
97
2-
07
6
CMOS CLOCK DISTRIBUTION
The AD9516 provides four clock outputs (OUT6 to OUT9)
that are selectable as either CMOS or LVDS level outputs. When
selected as CMOS, each output becomes a pair of CMOS outputs,
each of which can be individually turned on or off and set as
noninverting or inverting. These outputs are 3.3 V CMOS
compatible.
Figure 63. Series Termination of CMOS Output
Termination at the far end of the PCB trace is a second option.
The CMOS outputs of the AD9516 do not supply enough current
to provide a full voltage swing with a low impedance resistive, far-
end termination, as shown in Figure 64. The far-end termination
network should match the PCB trace impedance and provide the
desired switching point. The reduced signal swing may still meet
receiver input requirements in some applications. This can be
useful when driving long trace lengths on less critical nets.
Whenever single-ended CMOS clocking is used, some general
guidelines should be followed.
Point-to-point nets should be designed such that a driver has
only one receiver on the net, if possible. This allows for simple
termination schemes and minimizes ringing due to possible
mismatched impedances on the net. Series termination at the
source is generally required to provide transmission line matching
and/or to reduce current transients at the driver. The value of
the resistor is dependent on the board design and timing
requirements (typically 10 Ω to 100 Ω is used). CMOS outputs
are also limited in terms of the capacitive load or trace length
that they can drive. Typically, trace lengths less than 3 inches
are recommended to preserve signal rise/fall times and preserve
signal integrity.
CMOS
10
50
100
VS
0
79
72-
77
Figure 64. CMOS Output with Far-End Termination
Because of the limitations of single-ended CMOS clocking,
consider using differential outputs when driving high speed
signals over long traces. The AD9516 offers both LVPECL and
LVDS outputs that are better suited for driving long traces where
the inherent noise immunity of differential signaling provides
superior performance for clocking converters.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD9517-0A/PCBZ | 功能描述:BOARD EVALUATION FOR AD9517-0A RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱(chēng):82EBV2081 |
| AD9517-0ABCPZ | 功能描述:IC CLOCK GEN 2.8GHZ VCO 48LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類(lèi)型:時(shí)鐘/頻率合成器 PLL:無(wú) 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤(pán)，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱(chēng):SY58052UMGTRSY58052UMGTR-ND |
| AD9517-0ABCPZ-RL7 | 功能描述:IC CLOCK GEN 2.8GHZ VCO 48LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類(lèi)型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無(wú) 頻率 - 最大:240MHz 除法器/乘法器:是/無(wú) 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9517-0BCPZ | 制造商:Analog Devices 功能描述: |
| AD9517-1 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:12-Output Clock Generator with Integrated 2.5 GHz VCO |
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