參數(shù)資料
型號(hào): AD9278BBCZ
廠商: Analog Devices Inc
文件頁數(shù): 13/44頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 50MSPS 144CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: AAF,ADC,解調(diào)器,LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 50M
數(shù)據(jù)接口: 串行,SPI?
電壓電源: 模擬和數(shù)字
電源電壓: 1.7 V ~ 1.9 V,2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 144-CSPBGA(10x10)
包裝: 托盤
AD9278
Data Sheet
Rev. A | Page 20 of 44
CHANNEL OVERVIEW
POST
AMP
LNA
GAIN–
GAIN+
SERIAL
LVDS
AAF
ATTENUATOR
–45dB TO 0dB
GAIN
INTERPOLATOR
PIPELINE
ADC
LOSW-x
LO-x
LI-x
LG-x
RESET
4LO+
4LO–
RFB2
LO
GENERATION
15.6dB,
17.9dB,
21.3dB
21dB,
24dB,
27dB,
30dB
CWI+
CWI–
CWQ+
CWQ–
DOUTx+
DOUTx–
RFB1
CLG
CSH
TRANSDUCER
CS
T/R
SWITCH
09424-
038
Figure 38. Simplified Block Diagram of a Single Channel
Each channel contains both a TGC signal path and a CW Doppler
signal path. Common to both signal paths, the LNA provides four
user-adjustable input impedance termination options for
matching different probe impedances. The CW Doppler path
includes an I/Q demodulator with programmable phase rotation
needed for analog beamforming. The TGC path includes a
differential X-AMP VGA, an antialiasing filter, and an ADC.
Figure 38 shows a simplified block diagram with external
components.
TGC OPERATION
The TGC signal path is fully differential throughout to
maximize signal swing and reduce even-order distortion;
however, the LNAs are designed to be driven from a single-
ended signal source. Gain values are referenced from the single-
ended LNA input to the differential ADC input. A simple
exercise in understanding the maximum and minimum gain
requirements is shown in Figure 39.
The maximum gain required is determined by
(ADC Noise Floor/LNA Input Noise Floor) + Margin =
20 log(224/5.8) + 11 dB = 42 dB
The minimum gain required is determined by
(ADC Input FS/LNA Input FS) + Margin =
20 log(2/0.45) 10 dB = 3 dB
Therefore, 42 dB of gain range for a 12-bit, 40 MSPS ADC with
15 MHz of bandwidth should suffice in achieving the dynamic
range required for most of today’s ultrasound systems.
The system gain is distributed as listed in Table 7.
Table 7. Channel Gain Distribution
Section
Nominal Gain (dB)
LNA
15.6/17.9/21.3
Attenuator
0 to 45
VGA Amplifier
21/24/27/30
Filter
0
ADC
0
The linear-in-dB gain (law conformance) range of the TGC path
is 45 dB. The slope of the gain control interface is 28 dB/V, and
the gain control range is 0.8 V to +0.8 V. Equation 3 is the
expression for the differential voltage, VGAIN, at the gain control
interface. Equation 4 is the expression for the VGA attenuation,
VGAATT, as a function of VGAIN.
VGAIN (V) = (GAIN+) (GAIN)
(3)
)
8
.
0
(
V
dB
28
)
dB
(
GAIN
ATT
V
VGA
=
(4)
The total channel gain can then be calculated as in Equation 5.
GAIN
ATT
GAIN
PGA
VGA
LNA
n
ChannelGai
+
=
)
dB
(
(5)
In its default condition, the LNA has a gain of 21.3 dB (12×), and
the VGA postamp gain is 24 dB if the voltage on the GAIN+ pin
is 0 V and the voltage on the GAIN pin is 0.8 V (42 dB attenu-
ation). This results in a total gain (or ICPT) of 3.6 dB through
the TGC path if the LNA input is unmatched or a total gain of
2.4 dB if the LNA is matched to 50 (RFB = 350 ). However,
if the voltage on the GAIN+ pin is 1.6 V and the voltage on the
GAIN pin is 0.8 V (0 dB attenuation), the VGA gain is 24 dB.
This results in a total gain of 45 dB through the TGC path if the
LNA input is unmatched or in a total gain of 39 dB if the LNA
input is matched.
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