參數(shù)資料
型號(hào)： AD9269BCPZRL7-20
廠商： Analog Devices Inc
文件頁數(shù)： 21/40頁
文件大小： 0K
描述： IC ADC 16BIT 20MSPS DL 64LFCSP
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 16
采樣率（每秒）： 20M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 102mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，單極；4 個(gè)單端，雙極；2 個(gè)差分，單極；2 個(gè)差分，雙極
AD9269
Rev. 0 | Page 28 of 40
DC AND QUADRATURE ERROR CORRECTION (QEC)
In direct conversion or other quadrature systems, mismatches
between the real (I) and imaginary (Q) signal paths cause fre-
quencies in the positive spectrum to image into the negative
spectrum, and vice versa. From an RF point of view, this is
equivalent to information above the local oscillator (LO)
frequency interfering with information below the LO frequency,
and vice versa. These mismatches may occur from gain and/or
phase mismatches in the analog quadrature demodulator or in
any other mismatches between the I and Q signal chains. In a
single-carrier zero-IF system where the carrier has been placed
symmetrically around dc, this causes self-distortion of the carrier
as the two sidebands fold onto one another and degrade the
error vector magnitude (EVM) of the signal.
In a multicarrier communication system, this can be even more
problematic because carriers of widely different power levels
can interfere with one another. For example, a large carrier
centered at +f1 can have an image appear at f1 that may be
much larger than the desired carrier at f1.
The integrated quadrature error correction (QEC) algorithm of
the AD9269 attempts to measure and correct the amplitude and
phase imbalances of the I and Q signal paths to achieve higher
levels of image suppression than is achievable by analog means
alone. These errors can be corrected in an adapted manner, in
which the I and Q gain and quadrature phase mismatches are
constantly estimated and corrected, allowing for constant
tracking of slow changes in mismatches that are due to supply
and temperature.
The quadrature errors are corrected in a frequency independent
manner on the AD9269; therefore, systems with significant
mismatch in the baseband I and Q signal chains may have
reduced image suppression. The AD9269 QEC still corrects the
systematic imbalances.
The convergence time of the QEC algorithm is dependent on
the statistics of the input signal. For large signals and large
imbalance errors, this convergence time is typically less than
2 million samples of the AD9269 data rate.
LO Leakage (DC) Correction
In a direct conversion receiver subsystem, LO to RF leakage of
the quadrature modulator shows up as dc offsets at baseband.
These offsets are added to dc offsets in the baseband signal
paths, and both contribute to a carrier at dc. In a zero-IF receiver,
this dc energy can cause problems because it appears in band of
a desired channel. As part of the QEC function, the dc offset is
suppressed by applying a low frequency notch filter to form
a null around dc.
In applications where constant tracking of the dc offsets and
quadrature errors are not needed, the algorithms can be
independently frozen to save power. When frozen, the image
and LO leakage (dc) correction are still performed, but changes
are no longer tracked. Bits[5:3] in Register 0x110 disable the
respective correction when frozen.
The default configuration on the AD9269 has the QEC and dc
correction blocks disabled, and Bits[2:0] in Register 0x110 must
be pulled high to enable the correction blocks. The quadrature
gain, quadrature phase, and dc correction algorithms can also
be disabled independently for system debugging or to save
power by pulling Bits[2:0] low in Register 0x110.
When the QEC is enabled and a correction value has been
calculated, the value remains active as long as any of the QEC
functions (DC, gain, or phase correction) are being used.
QEC and DC Correction Range
Table 13 gives the minimum and maximum correction ranges
of the algorithms. If the mismatches are greater than these ranges,
an imperfect correction results.
Table 13. QEC and DC Correction Range
Parameter
Minimum
Maximum
Gain
1.1 dB
+1.0 dB
Phase
1.79 degrees
+1.79 degrees
DC
6 %
+6%
0
–15
–30
–45
–60
–75
–135
–120
–105
–90
–
30.
0M
–
37.
5M
–
22.
5M
–
15.
0M
–7.
5M
0M
7.
5M
15
M
22.
5M
30
M
37.
5M
AM
P
L
IT
UD
E
(
d
BF
S
)
FREQUENCY (MHz)
08
53
8-
0
65
4
3
2
5
6
IMAGE
DC OFFSET
Figure 57. QEC Mode Off
0
–15
–30
–45
–60
–75
–135
–120
–105
–90
–
30.
0M
–
37.
5M
–
22.
5M
–
15.
0M
–7.
5M
0M
7.
5M
15
M
22.
5M
30
M
37.
5M
AM
P
L
IT
UD
E
(
d
BF
S
)
FREQUENCY (MHz)
08
53
8-
0
66
4
3
2
5
6
IMAGE
DC OFFSET
Figure 58. QEC Mode On
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