參數(shù)資料
型號(hào)： AD9269BCPZRL7-20
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 14/40頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT 20MSPS DL 64LFCSP
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 16
采樣率（每秒）： 20M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 102mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，單極；4 個(gè)單端，雙極；2 個(gè)差分，單極；2 個(gè)差分，雙極
AD9269
Rev. 0 | Page 21 of 40
In any configuration, the value of Shunt Capacitor C is dependent
on the input frequency and source impedance and may need to
be reduced or removed. Table 9 displays the suggested values to set
the RC network. However, these values are dependent on the
input signal and should be used only as a starting guide.
Table 9. Example RC Network
Frequency Range (MHz)
R Series
(Ω Each)
C Differential (pF)
0 to 70
33
22
70 to 200
125
Open
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 44
shows a typical single-ended input configuration.
1V p-p
R
C
49.9
0.1F
10F
0.1F
AVDD
1k
1k
1k
1k
ADC
AVDD
VIN+x
VIN–x
08
53
8-
00
9
Figure 44. Single-Ended Input Configuration
VOLTAGE REFERENCE
A stable and accurate 1.0 V voltage reference is built into the
AD9269. VREF can be configured using either the internal 1.0 V
reference or an externally applied 1.0 V reference voltage. The
various reference modes are summarized in the sections that
follow. The Reference Decoupling section describes the best-
practices PCB layout of the reference.
Internal Reference Connection
A comparator within the AD9269 detects the potential at the
SENSE pin and configures the reference into two possible modes,
which are summarized in Table 10. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 45), setting VREF to 1.0 V.
VREF
SENSE
0.5V
ADC
SELECT
LOGIC
0.1F
1.0F
VIN–A/VIN–B
VIN+A/VIN+B
ADC
CORE
08
53
8-
0
12
Figure 45. Internal Reference Configuration
If the internal reference of the AD9269 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 46 shows
how the internal reference voltage is affected by loading.
0
–3.0
02
LOAD CURRENT (mA)
RE
F
E
RE
NCE
V
O
L
T
AG
E
RR
O
R
(
%
)
.0
–0.5
–1.0
–1.5
–2.0
–2.5
0.2
0.4
0.6
0.8
1.0
1.4
1.6
1.8
1.2
INTERNAL VREF = 0.993V
08
53
8-
0
14
Figure 46. VREF Accuracy vs. Load Current
Table 10. Reference Configuration Summary
Selected Mode
SENSE Voltage (V)
Resulting VREF (V)
Resulting Differential Span (V p-p)
Fixed Internal Reference
AGND to 0.2
1.0 internal
2.0
Fixed External Reference
AVDD
1.0 applied to external VREF pin
2.0
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AD9269BCPZRL7-40 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit 40 Msps low pwr dual ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體:
AD9269BCPZRL7-65 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit 65 Msps low pwr dual ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體:
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