參數(shù)資料
型號: AD8376ACPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 8/24頁
文件大?。?/td> 0K
描述: IC AMP VGA DIFF DUAL 32LFCSP
產(chǎn)品培訓(xùn)模塊: Differential Circuit Design Techniques for Communication Applications
設(shè)計資源: Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002)
High Performance, Dual Channel IF Sampling Receiver (CN0140)
標準包裝: 1
放大器類型: 可變增益
電路數(shù): 2
輸出類型: 差分
轉(zhuǎn)換速率: 5000 V/µs
-3db帶寬: 700MHz
電流 - 輸入偏壓: 900nA
電流 - 電源: 250mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ(5x5)
包裝: 標準包裝
產(chǎn)品目錄頁面: 775 (CN2011-ZH PDF)
其它名稱: AD8376ACPZ-R7DKR
AD8376
Data Sheet
Rev. B | Page 16 of 24
For optimum performance, the AD8376 should be driven
differentially using an input balun or impedance transformer.
Figure 39 uses a wideband 1:1 transmission line balun followed
by two 37.5 Ω resistors in parallel with the 150 Ω input imped-
ance of the AD8376 to provide a 50 Ω differential terminated
input impedance. This provides a wideband match to a 50 Ω
source. The open-collector outputs of the AD8376 are biased
through the two 1 μH inductors and are ac-coupled to the two
82 Ω load resistors. The 82 Ω load resistors in parallel with the
series-terminated ADC impedance yields the target 150 Ω
differential load impedance, which is recommended to provide
the specified gain accuracy of the device. The load resistors are
ac-coupled from the AD9445 to avoid common-mode dc
loading. The 33 Ω series resistors help to improve the isolation
between the AD8376 and any switching currents present at the
analog-to-digital sample and hold input circuitry.
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
(d
B
F
S)
0
5.25 10.50 15.75 21.00 26.25 31.50 36.75 42.00 47.25 52.50
FREQUENCY (MHz)
SNR = 64.93dBc
SFDR = 86.37dBc
NOISE FLOOR = –108.1dB
FUND = –1.053dBFs
SECOND = –86.18dBc
THIRD = –86.22dBc
1
2
3
4
5
6
+
06725-
040
Figure 40. Measured Single-Tone Performance of the
Circuit in Figure 39 for a 100 MHz Input Signal
The circuit depicted in Figure 39 provides variable gain,
isolation, and source matching for the AD9445. Using this
circuit with the AD8376 in a gain of 20 dB (maximum gain), an
SFDR performance of 86 dBc is achieved at 100 MHz, as
indicated in Figure 40.
The addition of the series inductors L (series) in Figure 39
extends the bandwidth of the system and provides response
flatness. Using 100 nH inductors as L (series), the wideband
system response of Figure 41 is obtained. The wideband
frequency response is an advantage in broadband applications
such as predistortion receiver designs and instrumentation
applications. However, by designing for a wide analog input
frequency range, the cascaded SNR performance is somewhat
degraded due to high frequency noise aliasing into the wanted
Nyquist zone.
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
(d
B
F
S)
20
48
76
104
132
160
188
216
244
272
300
FREQUENCY (MHz)
FIRST POINT = –2.93dBFs
END POINT = –9.66dBFs
MID POINT = –2.33dBFs
MIN = –9.66dBFs
MAX = –1.91dBFs
06725-
041
Figure 41. Measured Frequency Response of Wideband
ADC Interface Depicted in Figure 39
An alternative narrow-band approach is presented in Figure 42.
By designing a narrow band-pass antialiasing filter between the
AD8376 and the target ADC, the output noise of the AD8376
outside of the intended Nyquist zone can be attenuated, helping
to preserve the available SNR of the ADC. In general, the SNR
improves several dB when including a reasonable order antialias-
ing filter. In this example, a low loss 1:3 input transformer is used
to match the AD8376’s 150 Ω balanced input to a 50 Ω unbal-
anced source, resulting in minimum insertion loss at the input.
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