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| 型號(hào)： | AD8352ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP RF/IF DIFF 2GHZ 16-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Differential Circuit Design Techniques for Communication Applications |
| 設(shè)計(jì)資源： | Using AD8352 as an Ultralow Distortion Differential RF/IF Front End for High Speed ADCs (CN0046) |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | RF/IF 差分 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 8000 V/µs |
| -3db帶寬： | 2.2GHz |
| 電流 - 輸入偏壓： | 75nA |
| 電流 - 電源： | 37mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-VQ |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 550 (CN2011-ZH PDF) |
| 其它名稱： | AD8352ACPZ-R7DKR |
AD8352
Rev. B | Page 14 of 20
48
38
0
200
FREQUENCY (MHz)
OIP
3(
d
B
m
)
47
46
45
44
43
42
41
40
39
50
100
150
05
72
8-
03
0
RL = 200
RD = 4.3k
CD = 0.3pF
6dB
10dB
15dB
18dB
AV =
Figure 32. Third-Order Intermodulation Distortion, OIP3 vs.
Frequency for Various Gain Settings
6.0
0
30
190
FREQUENCY (MHz)
C
D
(pF
)
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
50
70
90
110
130
150
170
05
72
8-
03
1
RL = 200
RD = 4.3k
6dB
10dB
15dB
18dB
AV =
Figure 33. Narrow-Band CD vs. Frequency for Various Gain Settings
HIGH PERFORMANCE ADC DRIVING
The AD8352 provides the gain, isolation, and balanced low
distortion output levels for efficiently driving wideband ADCs
such as the AD9445.
illustrate the typical front-end circuit interface for the AD8352
differentially driving the AD9445 14-bit ADC at 105 MSPS. The
AD8352, when used in the single-ended configuration, shows little
or no degradation in overall third-order harmonic performance
(vs. differential drive). See the Single-Ended Input Operation
display the results for the differential configuration. Though not
shown, the single-ended, third-order levels are similar.
The 50 Ω resistor shown in Figure 34 provides a 50 Ω differential
input impedance to the source for matching considerations.
When the driver is less than one eighth of the wavelength from
the AD8352, impedance matching is not required thereby negating
the need for this termination resistor. The output 24 Ω resistors
provide isolation from the analog-to-digital input.
Refer to the Layout and Transmission Line Effects section for
more information. The circuit in Figure 35 represents a single-
ended input to differential output configuration for driving the
200 Ω) provide the input impedance match for a 50 Ω system.
Again, if input reflections are minimal, this impedance match is
not required. A fixed 200 Ω resistor (RN) is required to balance
the output voltages that are required for second-order distortion
cancellation. RG is the gain setting resistor for the AD8352 with
the RD and CD components providing distortion cancellation.
The AD9445 presents approximately 2 kΩ in parallel with
5 pF/differential load to the AD8352 and requires a 2.0 V p-p
differential signal (VREF = 1 V) between VIN+ and VIN for a
full-scale output operation.
These AD8352 simplified circuits provide the gain, isolation,
and distortion performance necessary for efficiently driving
high linearity converters, such as the AD9445. This device also
provides balanced outputs whether driven differentially or single-
ended, thereby maintaining excellent second-order distortion
levels. However, at frequencies above ~100 MHz, due to phase-
related errors, single-ended, second-order distortion is relatively
higher. The output of the amplifier is ac-coupled to allow for an
optimum common-mode setting at the ADC input. Input ac
coupling can be required if the source also requires a common-
mode voltage that is outside the optimum range of the AD8352.
A VCM common-mode pin is provided on the AD8352 that
equally shifts both input and output common-mode levels.
Increasing the gain of the AD8352 increases the system noise and,
thus, decreases the SNR (3.5 dB at 100 MHz input for Av = 10 dB)
of the AD9445 when no filtering is used. Note that amplifier gains
from 3 dB to 18 dB, with proper selection of CD and RD, do not
appreciably affect distortion levels. These circuits, when configured
properly, can result in SFDR performance of better than 87 dBc
at 70 MHz and 82 dBc at 180 MHz input. Single-ended drive, with
appropriate CD and RD, give similar results for SFDR and third-
order intermodulation levels shown in these figures.
Placing antialiasing filters between the ADC and the amplifier
is a common approach for improving overall noise and broad-
band distortion performance for both band-pass and low-pass
applications. For high frequency filtering, matching to the filter
is required. The AD8352 maintains a 100 Ω output impedance
well beyond most applications and is well-suited to drive most
filter configurations with little or no degradation in distortion.
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| AD8352ACPZ-WP | 制造商:Analog Devices 功能描述:SP Amp DIFF AMP Single 5.5V 16-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:SP AMP DIFF AMP SGL 5.5V 16LFCSP EP - Waffle Pack 制造商:Analog Devices 功能描述:AMP DIFF RF/IF SMD LFCSP-16 8352 |
| AD8352-EVAL | 制造商:Analog Devices 功能描述:EVALUATION BOARD FOR AD8352 - Bulk |
| AD8352-EVALZ | 制造商:Analog Devices 功能描述:EVAL BD OF AD8352 - Bulk |
| AD8353 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
| AD8353_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 MHz to 2.7 GHz RF Gain Block |
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