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參數(shù)資料
型號: AD8317ACPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 15/20頁
文件大?。?/td> 0K
描述: IC AMP LOG DETECT 8GHZ 8-LFCSP
產(chǎn)品培訓(xùn)模塊: Choosing and Using RF Detectors
標(biāo)準(zhǔn)包裝: 1
類型: 對數(shù)放大器
應(yīng)用: 接收器信號強(qiáng)度指示(RSSI)
安裝類型: 表面貼裝
封裝/外殼: 8-VFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-LFCSP-VD(3x2)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 550 (CN2011-ZH PDF)
其它名稱: AD8317ACPZ-R7DKR
AD8317
Rev. B | Page 4 of 20
Parameter
Conditions
Min
Typ
Max
Unit
f = 5.8 GHz
RTADJ = 500 Ω
Input Impedance
110||0.05
Ω||pF
±1 dB Dynamic Range
TA = 25°C
50
dB
40°C < TA < +85°C
48
dB
Maximum Input Level
±1 dB error
4
dBm
Minimum Input Level
±1 dB error
54
dBm
22
mV/dB
Intercept1
16
dBm
Output Voltage, High Power In
PIN = 10 dBm
0.59
V
Output Voltage, Low Power In
PIN = 40 dBm
1.27
V
f = 8.0 GHz
RTADJ = open
Input Impedance
28||0.79
Ω||pF
±1 dB Dynamic Range
TA = 25°C
44
dB
40°C < TA < +85°C
35
dB
Maximum Input Level
±1 dB error
2
dBm
Minimum Input Level
±1 dB error
46
dBm
22
mV/dB
Intercept2
21
dBm
Output Voltage, High Power In
PIN = 10 dBm
0.70
V
Output Voltage, Low Power In
PIN = 40 dBm
1.39
V
OUTPUT INTERFACE
VOUT (Pin 5)
Voltage Swing
VSET = 0 V, RFIN = open
VPOS 0.1
V
VSET = 1.7 V, RFIN = open
10
mV
Output Current Drive
VSET = 0 V, RFIN = open
10
mA
Small Signal Bandwidth
RFIN = 10 dBm, from CLPF to VOUT
140
MHz
Output Noise
RFIN = 2.2 GHz, 10 dBm, fNOISE = 100 kHz,
CLPF = open
90
nV/√Hz
Fall Time
Input level = no signal to 10 dBm, 90% to 10%,
CLPF = 8 pF
18
ns
Input level = no signal to 10 dBm, 90% to 10%,
CLPF = open, ROUT = 150 Ω
6
ns
Rise Time
Input level = 10 dBm to no signal, 10% to 90%,
CLPF = 8 pF
20
ns
Input level = 10 dBm to no signal, 10% to 90%,
CLPF = open, ROUT = 150 Ω
10
ns
Video Bandwidth (or Envelope Bandwidth)
50
MHz
VSET INTERFACE
VSET (Pin 4)
Nominal Input Range
RFIN = 0 dBm, measurement mode
0.35
V
RFIN = 50 dBm, measurement mode
1.40
V
Logarithmic Scale Factor
45
dB/V
Input Resistance
RFIN = 20 dBm, controller mode, VSET = 1 V
40
TADJ INTERFACE
TADJ (Pin 6)
Input Resistance
TADJ = 0.9 V, sourcing 50 μA
13
Disable Threshold Voltage
TADJ = open
VPOS 0.4
V
POWER INTERFACE
VPOS (Pin 7)
Supply Voltage
3.0
5.5
V
Quiescent Current
18
22
30
mA
vs. Temperature
40°C ≤ TA ≤ +85°C
60
μA/°C
Disable Current
TADJ = VPOS
200
μA
1 Slope and intercept are determined by calculating the best-fit line between the power levels of 40 dBm and 10 dBm at the specified input frequency.
2 Slope and intercept are determined by calculating the best-fit line between the power levels of 34 dBm and 16 dBm at 8.0 GHz.
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