if the DDC bus is using 5 V I
參數(shù)資料
型號(hào)： AD8196ACPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 15/24頁(yè)
文件大小： 0K
描述： IC SWITCH DVI/HDMI 2:1 56-LFCSP
標(biāo)準(zhǔn)包裝： 1
類型： HDMI/DVI 開關(guān)
應(yīng)用： DVI，HDMI 信號(hào)開關(guān)
安裝類型： 表面貼裝
封裝/外殼： 56-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 56-LFCSP-VQ（8x8）
包裝： 托盤
AD8196
Rev. 0 | Page 22 of 24
maximum allowed voltage on the auxiliary lines. For example,
if the DDC bus is using 5 V I2C, then AMUXVCC should be
connected to +5 V relative to DVEE.
In a typical application, all pins labeled AVEE or DVEE should
be connected directly to ground. All pins labeled AVCC,
DVCC, VTTI, or VTTO should be connected to 3.3 V, and
Pin AMUXVCC tied to 5 V. The supplies can also be powered
individually, but care must be taken to ensure that each stage of
the AD8196 is powered correctly.
Power Supply Bypassing
The AD8196 requires minimal supply bypassing. When
powering the supplies individually, place a 0.01 μF capacitor
between each 3.3 V supply pin (AVCC, DVCC, VTTI, and
VTTO) and ground to filter out supply noise. Generally, bypass
capacitors should be placed near the power pins and should
connect directly to the relevant supplies (without long inter-
vening traces). For example, to improve the parasitic inductance
of the power supply decoupling capacitors, minimize the trace
length between capacitor landing pads and the vias as shown in
EXTRA ADDED INDUCTANCE
RECOMMENDED
NOT RECOMMENDED
064
70
-03
4
Figure 34. Recommended Pad Outline for Bypass Capacitors
In applications where the AD8196 is powered by a single 3.3 V
supply, it is recommended to use two reference supply planes
and bypass the 3.3 V reference plane to the ground reference
plane with one 220 pF, one 1000 pF, two 0.01 μF, and one 4.7 μF
capacitors. The capacitors should via down directly to the
supply planes and be placed within a few centimeters of the
AD8196. The AMUXVCC supply does not require additional
bypassing. This scheme is illustrated in Figure 35.
DECOUPLING
CAPACITORS
AUXILIARY LINES
TMDS TRACES
AD8196
0
64
70
-03
5
Figure 35. Example Placement of Power Supply Decoupling Capacitors
Around the AD8196
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