參數(shù)資料
型號: AD8177ABPZ
廠商: Analog Devices Inc
文件頁數(shù): 27/40頁
文件大?。?/td> 0K
描述: IC VIDEO CROSSPOINT SWIT 676BGA
標準包裝: 1
功能: 視頻交叉點開關
電路: 3 x 16:5
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 4.5 V ~ 5.5 V,±2.5V
電流 - 電源: 460mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應商設備封裝: 676-BGA(27x27)
包裝: 管件
AD8177
Rev. 0 | Page 33 of 40
Power Dissipation
Calculation of Power Dissipation
06
60
5-
0
04
AMBIENT TEMPERATURE (°C)
MA
XI
M
U
M
P
O
W
E
R
(
W
)
3
4
5
6
7
8
9
10
15
25
35
45
55
65
75
85
TJ = 150°C
Figure 51. Maximum Die Power Dissipation vs. Ambient Temperature
The curve in Figure 51 was calculated from the following:
JA
AMBIENT
MAX
JUNCTION
MAX
D
T
P
θ
=
,
(1)
As an example, if the AD8177 is enclosed in an environment
at 45°C (TA), the total on-chip dissipation under all load and
supply conditions must not be allowed to exceed 7.0 W.
When calculating on-chip power dissipation, it is necessary to
include the power dissipated in the output devices due to
current flowing in the loads. For a sinusoidal output about
ground and symmetrical split supplies, the on-chip power
dissipation due to the load can be approximated by
PD,OUTPUT
= (VPOS VOUTPUT,RMS) × IOUTPUT,RMS
(2)
For nonsinusoidal output, the power dissipation should be
calculated by integrating the on-chip voltage drop across the
output devices multiplied by the load current over one period.
The user can subtract the quiescent current for the Class AB
output stage when calculating the loaded power dissipation.
For each output stage driving a load, subtract a quiescent power,
according to
PDQ, OUTPUT
= (VPOS VNEG) × IOUTPUT, QUIESCENT
(3)
where IOUTPUT, QUIESCENT = 1.65 mA for each single-ended output
pin of the AD8177.
For each disabled RGB output channel, the quiescent power supply
current in VPOS and VNEG drops by approximately 34 mA.
QNPN
QPNP
VNEG
VPOS
VOUTPUT
IOUTPUT
IO, QUIESCENT
06
60
5-
0
25
Figure 52. Simplified Output Stage
Example
With an ambient temperature of 85°C, all five RGB output channels
driving 1 Vrms into 100 Ω loads, and power supplies at ±2.5 V,
follow these steps:
1.
Calculate power dissipation using data sheet quiescent
currents. Neglect VDD current because it is insignificant.
PD,QUIESCENT
= (VPOS × IVPOS) + (VNEG × IVNEG)
(4)
PD,QUIESCENT
= (2.5 V × 460 mA) + (2.5 V × 460 mA) = 2.3 W
2.
Calculate power dissipation from loads. For a differential
output and ground-referenced load, the output power is
symmetrical in each output phase.
PD, OUTPUT
= (VPOS VOUTPUT, RMS) × IOUTPUT, RMS
(5)
PD, OUTPUT
= (2.5 V 1 V) × 1 V/100 Ω = 15 mW
There are 15 output pairs, or 30 output currents.
nPD, OUTPUT
= 30 × 15 mW = 0.45 W
3.
Subtract quiescent output stage current for the number
of loads (30 in this example). The output stage is either
standing or driving a load, but the current needs to be
counted only once (valid for output voltages > 0.5 V).
PDQ, OUTPUT
= (VPOS VNEG) × IOUTPUT, QUIESCENT
(6)
PDQ, OUTPUT
= (2.5 V (2.5 V)) × 1.65 mA = 8.25 mW
There are 15 output pairs, or 30 output currents.
nPDQ, OUTPUT
= 30 × 8.25 mW = 0.25 W
4.
Verify that power dissipation does not exceed the maximum
allowed value.
PD, ON-CHIP
= PD,QUIESCENT + nPD, OUTPUT nPDQ, OUTPUT
(7)
PD, ON-CHIP =
2.3 W + 0.45 W 0.25 W = 2.5 W
From Figure 51 or Equation 1, this power dissipation is below
the maximum allowed dissipation for all ambient temperatures
up to, and including, 85°C.
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