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| 型號： | AD8177ABPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/40頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO CROSSPOINT SWIT 676BGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 視頻交叉點(diǎn)開關(guān) |
| 電路： | 3 x 16:5 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V，±2.5V |
| 電流 - 電源： | 460mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-BGA（27x27） |
| 包裝： | 管件 |
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AD8177
Rev. 0 | Page 32 of 40
Single-Ended Gain
The AD8177 operates as a closed-loop differential amplifier.
The primary control loop forces the difference between the
output terminals to be a ratio of the difference between the
input terminals. One output increases in voltage, while the
other decreases an equal amount to make the total output
voltage difference correct. The average of these output voltages
is forced to the voltage on the common-mode reference terminal
(VOCM_CMENCOFF or VOCM_CMENCON) by a second
control loop. If only one output terminal is observed with respect
to the common-mode reference terminal, only half of the differ-
ence voltage is observed. This implies that when using only one
output of the device, half of the differential gain is observed.
An AD8177 taken with single-ended output appears to have
a gain of +1.
It is important to note that all considerations applying to the
used output phase regarding output voltage headroom, apply
unchanged to the complement output phase even if this is not
actually used.
Termination
When operating the AD8177 with a single-ended output, the
preferred output termination scheme is to refer the load to the
output common mode. A series-termination can be used, at an
additional cost of one half the signal gain.
In single-ended output operation, the complementary phase
of the output is not used and may or may not be terminated
locally. Although the unused output can be floated to reduce
power dissipation, there are several reasons for terminating the
unused output with a load resistance matched to the load on the
signal output.
One component of crosstalk is magnetic coupling by mutual
inductance between output package traces and bond wires that
carry load current. In a differential design, there is coupling
from one pair of outputs to other adjacent pairs of outputs. The
differential nature of the output signal simultaneously drives the
coupling field in one direction for one phase of the output and
in an opposite direction for the other phase of the output. These
magnetic fields do not couple equally into adjacent output pairs
due to different proximities, but they do destructively cancel the
crosstalk to some extent. If the load current in each output is
equal, this cancellation is greater, and less adjacent crosstalk is
observed (regardless of whether the second output is actually
being used).
A second benefit of balancing the output loads in a differential
pair is the reduction of fluctuations in current requirements
from the power supply. In single-ended loads, the load currents
alternate from the positive supply to the negative supply. This
creates a parasitic signal voltage in the supply pins due to the
finite resistance and inductance of the supplies.
This supply fluctuation appears as crosstalk in all outputs,
attenuated by the power supply rejection ratio (PSRR) of the
device. At low frequencies, this is a negligible component of
crosstalk, but PSRR falls off as frequency increases. With the
use of differential, balanced loads, as one output draws current
from the positive supply, the other output draws current from
the negative supply. When the phase alternates, the first output
draws current from the negative supply and the second from the
positive supply. The effect is that a more constant current is
drawn from each supply, such that the crosstalk-inducing
supply fluctuation is minimized.
A third benefit of driving balanced loads is that the output pulse
response changes as load changes. The differential signal control
loop in the AD8177 forces the difference of the outputs to be
a fixed ratio to the difference of the inputs. If the two output
responses are different due to loading, the control loop sees this
difference as signal response error and attempts to correct this
error. The output signal is distorted from the ideal response,
compared to the case when the two outputs are balanced.
Decoupling
The signal path of the AD8177 is based on high open-loop gain
amplifiers with negative feedback. Dominant-pole compensation
is used on-chip to stabilize these amplifiers over the range of
expected applied swing and load conditions. To guarantee this
designed stability, proper supply decoupling is necessary with
respect to both the differential control loops and the common-
mode control loops of the signal path. Signal-generated currents
must return to their sources through low impedance paths at all
frequencies in which there is still loop gain (up to 700 MHz at
a minimum).
The signal path compensation capacitors in the AD8177 are
connected to the VNEG supply. At high frequencies, this limits
the power supply rejection ratio (PSRR) from the VNEG supply
to a lower value than that from the VPOS supply. When possible,
an application board should be designed such that the VNEG
power is supplied from a low inductance plane, subject to the
least amount of noise.
VOCM_CMENCON and VOCM_CMENCOFF are high speed
common-mode control loops of all output drivers. In the single-
ended output sense, there is no rejection from noise on these
inputs to the outputs. For this reason, care must be taken to
produce low noise sources over the entire range of frequencies
of interest. This is important not only to single-ended operation but
to differential operation, as well, because there is a common-mode-
to-differential gain conversion that becomes greater at higher
frequencies.
VOCM_CMENCON and VOCM_CMENCOFF are internally
buffered to prevent transient currents from flowing into or out
of these inputs and becoming sources of crosstalk by acting on
their respective source impedances.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8177-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MHz, Triple 16 】 5 Video Crosspoint Switch |
| AD8178 | 制造商:AD 制造商全稱:Analog Devices 功能描述:450 MHz, Triple 16 】 5 Video Crosspoint Switch |
| AD8178ABPZ | 功能描述:IC VIDEO CROSSPOINT SWIT 676BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8178ABPZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:450 MHz, Triple 16 】 5 Video Crosspoint Switch |
| AD8178-EVALZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:450 MHz, Triple 16 】 5 Video Crosspoint Switch |
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