
AD8177
Rev. 0 | Page 27 of 40
APPLICATIONS INFORMATION
OPERATING MODES
Depending on the state of the CMENC logic input, the AD8177
can be set in either of two differential-in, differential-out operating
modes. An additional application is possible by tapping the outputs
single-ended and making use of the decoded H and V outputs.
Middle-of-Cat-5-Run Application, CM Encoding Turned Off
In this application, the AD8177 is placed somewhere in the
middle of a Cat-5 run. By tying CMENC low, the CM of each
RGB differential pair is removed through the device (or turned
off), while the overall CM at the output is defined by the reference
value VOCM_CMENCOFF. In this mode of operation, CM noise
is removed, while the intended differential RGB signals are
buffered and passed to the outputs. The AD8177 is placed in
this operation mode when used in a sync-on color scheme.
Figure 46 shows the voltage levels and CM handling for a single
input channel connected to a single output channel in a middle-
of-Cat-5-run application with CM encoding turned off.
CMR
CMB
DIFF. R
DIFF. B
INPUT
OVERALL
CM
CMG
DIFF. G
CMENC
CMR
CMB
DIFF. R
DIFF. B
OUTPUT
OVERALL
CM
CMG
DIFF. G
VOCM_CMENCOFF
06605-
019
AD8177
Figure 46. AD8177 in a Middle-of-Cat-5-Run Application, CM Encoding Off
(Note that in this application, the H and V outputs,
though asserted, are not used.)
Input VBLK and Input VOCM_CMENCOFF allow the user
complete flexibility in defining the output CM level and the
amount of overlap between the positive and negative phases,
thus maximizing output headroom usage. Whenever VBLK
differs from VOCM_CMENCOFF by more than approximately
±100 mV, a differential voltage Δdiff is added at the outputs
according to the expression Δdiff = VBLK VOCM_CMENCOFF.
Conversely, whenever the difference between VBLK and
VOCM_CMENCOFF is less than approximately ±100 mV,
no differential voltage is added at the outputs.
As a first example, refer to
Figure 47. The positive phase of a
differential output is shown by the solid line, while the negative
phase is shown by the dashed line. The input to the crosspoint is
a positive differential pulse with a low level of 0 V and a high
level of 0.7 V.
The positive and negative outputs are shown with VOCM_
CMENCOFF and VBLK both set to 0 V. (Note that both pulses
have been slightly shifted off the 0 V line for clarity.)
0.7V
–0.7V
NEGATIVE
PHASE
POSITIVE
PHASE
VBLK = 0V
VOCM_CMENCOFF = 0V
06
60
5-
0
20
Figure 47. Output for 0 V to 0.7 V Input Differential Pulse, VBLK = 0 V,
VOCM_CMENCOFF = 0 V
As a second example, refer to
Figure 48. VCOM_CMENCOFF
is set to +0.35 V, and VBLK is set to 0.35 V. The input is still
a differential pulse with a low level of 0 V and a high level of
0.7 V. Note how the positive phase and the negative phase are
now shifted with respect to each other by an amount equal to
VBLK VOCM_CMENCOFF or 0.35 V 0.35 V = 0.7 V.
Because the negative output phase spans the same voltage range
as the positive output phase, the usable voltage range for single-
ended applications is effectively doubled over the previous example.
(Note that the output pulses have been slightly shifted with
respect to each other for clarity.)
0.7V
NEGATIVE
PHASE
POSITIVE
PHASE
VBLK = –0.35V
VOCM_CMENCOFF = +0.35V
0V
06
60
5-
02
1
Figure 48. Output for 0 V to 0.7 V Input Differential Pulse,
VBLK = 0.35 V, VOCM_CMENCOFF = +0.35 V
Middle-of-Cat-5-Run Application, CM Encoding Turned On
In this application, the AD8177 is also placed somewhere in the
middle of a Cat-5 run, although the common-mode handling is
different. By tying CMENC high, the CM of each RGB input is
passed through the part, while at the same time, the overall output
CM is stripped and set equal to the voltage applied at the VOCM_
CMENCON pin. The AD8177 is placed in this operation mode
when used with a sync-on CM scheme. Although asserted, the
H and V outputs are not used in this application.
Figure 49 shows
the voltage levels and CM handling for a single input channel
connected to a single output channel in a middle-of-Cat-5-run
application with CM encoding turned on.