參數(shù)資料
型號(hào)： AD7938BSUZ-6
廠商： Analog Devices Inc
文件頁數(shù)： 6/32頁
文件大小： 0K
描述： IC ADC 12BIT 8CHAN 32TQFP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 625k
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 7.5mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 托盤
輸入數(shù)目和類型： 8 個(gè)單端，單極；4 個(gè)差分，單極；4 個(gè)偽差分，單極；7 偽差分，單極
配用： EVAL-AD7938CBZ-ND - EVAL BOARD FOR AD7938
AD7938-6
Data Sheet
Rev. C | Page 14 of 32
Table 9. Analog Input Type Selection
Channel Address
MODE0 = 0, MODE1 = 0
MODE0 = 0, MODE1 = 1
MODE0 = 1, MODE1 = 0
MODE0 = 1, MODE1 = 1
Eight Single-Ended
Input Channels
Four Fully Differential
Input Channels
Four Pseudo Differential Input
Channels (Pseudo Mode 1)
Seven Pseudo Differential
Input Channels (Pseudo Mode 2)
ADD2
ADD1
ADD0
VIN+
VIN
VIN+
VIN
VIN+
VIN
VIN+
VIN
0
VIN0
AGND
VIN0
VIN1
VIN0
VIN1
VIN0
VIN7
0
1
VIN1
AGND
VIN1
VIN0
VIN1
VIN0
VIN1
VIN7
0
1
0
VIN2
AGND
VIN2
VIN3
VIN2
VIN3
VIN2
VIN7
0
1
VIN3
AGND
VIN3
VIN2
VIN3
VIN2
VIN3
VIN7
1
0
VIN4
AGND
VIN4
VIN5
VIN4
VIN5
VIN4
VIN7
1
0
1
VIN5
AGND
VIN5
VIN4
VIN5
VIN4
VIN5
VIN7
1
0
VIN6
AGND
VIN6
VIN7
VIN6
VIN7
VIN6
VIN7
1
VIN7
AGND
VIN7
VIN6
VIN7
VIN6
Not Allowed
SEQUENCER OPERATION
The configuration of the SEQ and SHDW bits in the control
register allows the user to select a particular mode of operation
of the sequencer function. Table 10 outlines the four modes of
operation of the sequencer.
Writing to the Control Register to Program the
Sequencer
The AD7938-6 needs 13 full CLKIN periods to perform a
conversion. If the ADC does not receive the full 13 CLKIN
periods, the conversion aborts. If a conversion is aborted after
applying 12.5 CLKIN periods to the ADC, ensure that a rising
edge of CONVST or a falling edge of CLKIN is applied to the
part before writing to the control register to program the
sequencer. If these conditions are not met, the sequencer will
not be in the correct state to handle being reprogrammed for
another sequence of conversions and the performance of the
converter is not guaranteed.
SHADOW REGISTER
The shadow register on the AD7938-6 is an 8-bit, write-only
register. Data is loaded from DB0 to DB7 on the rising edge of
WR. The eight LSBs load into the shadow register. The
information is written into the shadow register provided that
the SEQ and SHDW bits in the control register were set to 0 and
1, respectively, in the previous write to the control register. Each
bit represents an analog input from Channel 0 through Channel 7.
A sequence of channels can be selected through which the
AD7938-6 cycles with each consecutive conversion after the
write to the shadow register.
To select a sequence of channels to be converted, if operating in
single-ended mode or Pseudo Mode 2, the associated channel
bit in the shadow register must be set for each required analog
input. When operating in fully differential mode or Pseudo
Mode 1, the associated pair of channel bits must be set for each
pair of analog inputs required in the sequence.
With each consecutive CONVST pulse after the sequencer has
been set up, the AD7938-6 progresses through the selected
channels in ascending order, beginning with the lowest channel.
This continues until a write operation occurs with the SEQ and
SHDW bits configured in any way except 1, 0 (see
When a sequence is set up in differential mode or Pseudo
Mode 1, the ADC does not convert on the inverse pairs (that is,
VIN1, VIN0). The bit functions of the shadow register are
outlined in
. See the
section for
further information on using the sequencer.
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