VREF p-p " />
參數(shù)資料
型號(hào)： AD7938BSUZ-6
廠商： Analog Devices Inc
文件頁數(shù)： 11/32頁
文件大?。?/td> 0K
描述： IC ADC 12BIT 8CHAN 32TQFP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 625k
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 7.5mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 托盤
輸入數(shù)目和類型： 8 個(gè)單端，單極；4 個(gè)差分，單極；4 個(gè)偽差分，單極；7 偽差分，單極
配用： EVAL-AD7938CBZ-ND - EVAL BOARD FOR AD7938
Data Sheet
AD7938-6
Rev. C | Page 19 of 32
047
51
-03
2
*ADDITIONAL PINS OMITTED FOR CLARITY.
VREF
p-p
VIN+
VIN–
VREF
p-p
AD7938-6*
VREF (V)
CO
M
O
N-
M
O
DE
RAN
G
E
(
V
)
4.5
4.0
3.0
1.5
2.0
2.5
3.5
1.0
0.5
0
0.1
0.6
1.6
1.1
2.1
2.6
04
75
1-
0
34
TA = 25°C
COMMON-MODE
VOLTAGE
Figure 24. Differential Input Definition
The amplitude of the differential signal is the difference between
the signals applied to the VIN+ and VIN pins in each differential
pair (that is, VIN+ VIN). VIN+ and VIN should be simultaneously
driven by two signals each of amplitude VREF (or 2 × VREF,
depending on the range chosen) that are 180° out of phase. The
amplitude of the differential signal is therefore VREF to +VREF
peak-to-peak (that is, 2 × VREF). This is regardless of the
common mode (CM). The common mode is the average of the
two signals (that is, (VIN+ + VIN)/2) and is therefore the voltage
on which the two inputs are centered. This results in the span of
each input being CM ± VREF/2. This voltage has to be set up
externally and its range varies with the reference value VREF.
As the value of VREF increases, the common-mode range
decreases. When driving the inputs with an amplifier, the
actual common-mode range is determined by the amplifier’s
output voltage swing.
Figure 25 and Figure 26 show how the common-mode range
typically varies with VREF for a 5 V power supply using the 0 V
to VREF range or 2 × VREF range, respectively. The common
mode must be in this range to guarantee the functionality of the
AD7938-6.
When a conversion takes place, the common mode is rejected,
resulting in a virtually noise-free signal of amplitude VREF to
+VREF corresponding to the digital codes of 0 to 4096. If the
2 × VREF range is used, the input signal amplitude extends from
2 VREF to +2 VREF after conversion.
VREF (V)
0
00.5
1.5
1.0
2.0
2.5
3.0
04
75
1-
0
3
CO
M
O
N-
M
O
DE
RAN
G
E
(
V
)
3.5
3.0
2.0
1.5
2.5
1.0
0.5
3
TA = 25°C
Figure 25. Input Common-Mode Range vs. VREF (0 V to VREF Range, VDD = 5 V)
Figure 26. Input Common-Mode Range vs. VREF (2 × VREF Range, VDD = 5 V)
Driving Differential Inputs
Differential operation requires that VIN+ and VIN be
simultaneously driven with two equal signals that are 180° out
of phase. The common mode must be set up externally and has
a range that is determined by VREF, the power supply, and the
particular amplifier used to drive the analog inputs. Differential
modes of operation with either an ac or dc input provide the
best THD performance over a wide frequency range. Since not
all applications have a signal preconditioned for differential
operation, there is often a need to perform single-ended-to-
differential conversion.
Using an Op Amp Pair
An op amp pair can be used to directly couple a differential
signal to one of the analog input pairs of the AD7938-6. The
circuit configurations shown in Figure 27 and Figure 28 show
how a dual op amp can be used to convert a single-ended signal
into a differential signal for both a bipolar and unipolar input
signal, respectively.
The voltage applied to Point A sets up the common-mode
voltage. In both diagrams, it is connected in some way to the
reference, but any value in the common-mode range can be
input here to set up the common mode. A suitable dual op amp
that can be used in this configuration to provide differential
drive to the AD7938-6 is the AD8022.
It is advisable to take care when choosing the op amp; the
selection depends on the required power supply and system
performance objectives. The driver circuits in Figure 27 and
Figure 28 are optimized for dc coupling applications requiring
best distortion performance.
The differential op amp driver circuit in Figure 27 is configured
to convert and level shift a single-ended, ground-referenced
(bipolar) signal to a differential signal centered at the VREF level
of the ADC.
The circuit configuration shown in Figure 28 converts a
unipolar, single-ended signal into a differential signal.
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