參數(shù)資料
型號: AD7938BSUZ-6
廠商: Analog Devices Inc
文件頁數(shù): 15/32頁
文件大小: 0K
描述: IC ADC 12BIT 8CHAN 32TQFP
標準包裝: 1
位數(shù): 12
采樣率(每秒): 625k
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 7.5mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應商設備封裝: 32-TQFP(7x7)
包裝: 托盤
輸入數(shù)目和類型: 8 個單端,單極;4 個差分,單極;4 個偽差分,單極;7 偽差分,單極
配用: EVAL-AD7938CBZ-ND - EVAL BOARD FOR AD7938
AD7938-6
Data Sheet
Rev. C | Page 22 of 32
e
d r
en e is 2.5 V.
eference values is
f suitable voltage references from
Table 12. Examples of Suitable Voltage References
Reference
ting
)
For example, if operating in differential mode and the reference
is sourced from VDD, the 0 V to 2 × VREF range cannot be used.
This is because the analog input signal range now extends to 2 ×
VDD, which exceeds maximum rating conditions. In the pseudo
differential modes, the user must ensure that VREF + VIN ≤ VDD
when using the 0 V to VREF range, or when using the 2 × VREF
range that 2 × VREF +VIN ≤ VDD.
In all cases, the sp cifie
efer c
The performance of the part with different r
shown in Figure 9 to Figure 11. The value of the reference sets
the analog input span and the common-mode voltage range.
Errors in the reference source result in gain errors in the
AD7938-6 transfer function and add to specified full-scale
errors on the part.
Table 12 lists examples o
Analog Devices that can be used. Figure 34 shows a typical
connection diagram for an external reference.
Output
Initial Accuracy
Opera
Voltage
(% Maximum)
Current (μA
2.5/3
0.04
1000
2.5
0.04
500
8
2.04
0.05
500
Digital Inputs
The digital inputs applied to the AD7938-6 are not limited by
the maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
VDD + 0.3 V limit as on the analog inputs.
Another advantage of the digital inputs not being restricted by
the VDD + 0.3 V limit is the fact that power supply sequencing
issues are avoided. If any of these inputs are applied before VDD,
there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V were applied prior to VDD.
VDRIVE Input
The AD7938-6 has a VDRIVE feature. VDRIVE controls the voltage
at which the parallel interface operates. VDRIVE allows the ADC
to easily interface to 3 V and 5 V processors.
For example, if the AD7938-6 is operated with an AVDD of 5 V
and the VDRIVE pin is powered from a 3 V supply, the AD7938-6
has better dynamic performance with a VDD of 5 V while still
being able to interface directly to 3 V processors. Care should
be taken to ensure VDRIVE does not exceed VDD by more than
0.3 V (see the Absolute Maximum Ratings section).
AD7938-6*
1
AD780
NC
8
0
475
1-
0
42
2
+VIN
NC
7
3
GND
6
4
TEMP
5
VREF
O/PSELECT
TRIM
VOUT
NC
2.5V
NC
VDD
NC = NO CONNECT
10nF
0.1F
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 34. Typical VREF Connection Diagram
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