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參數(shù)資料
| 型號： | AD7829BRW-1 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT 8CH 2MSPS 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 2M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 36mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個(gè)單端，單極 |
AD7829-1
Rev. 0 | Page 11 of 20
A suggestion is to tie CONVST
ANALOG INPUT
to VDD or DGND through a
pull-up or pull-down resistor. A rising edge on the CONVST
pin causes the AD7829-1 to fully power up. For applications
where power consumption is of concern, the automatic power-
down at the end of a conversion should be used to improve
power performance (see the
The AD7829-1 has eight input channels. Each input channel has
an input span of 2.5 V or 2.0 V, depending on the supply voltage
(VDD). This input span is automatically set up by an on-chip
“VDD detector” circuit. A 5 V operation of the ADCs is detected
when VDD exceeds 4.1 V, and a 3 V operation is detected when
VDD falls below 3.8 V. This circuit also possesses a degree of
glitch rejection; for example, a glitch from 5.5 V to 2.7 V up to
60 ns wide does not trip the VDD detector.
Power vs. Throughput section).
If the AD7829-1 is operated outside normal VDD limits (for
example, a brown-out), it may take two conversions to reset the
part once the correct VDD has been established.
SUPPLY
4.5V TO 5.5V
10F
0.1F
VDD
VREF
VMID
VIN1
1.25V TO
3.75V INPUT
VIN2
VIN8
AGND
DB0 TO DB7
EOC
RD
CS
CONVST
A0
A1
A2
PARALLEL
INTERFACE
C/P
AD7829-1
DGND
2.5V
AD780
06
17
9-
00
8
The VMID pin is used to center this input span anywhere in the
range of AGND to VDD. If no input voltage is applied to VMID,
the default input range is AGND to 2.0 V (VDD = 3 V ± 10%),
that is, centered about 1.0 V; or AGND to 2.5 V (VDD = 5 V ± 10%),
that is, centered about 1.25 V. When using the default input range,
the VMID pin can be left unconnected; or, in some cases, it can be
decoupled to AGND with a 0.1 μF capacitor.
If, however, an external VMID is applied, the analog input range
is from VMID 1.0 V to VMID + 1.0 V (VDD = 3 V ± 10%), or from
VMID 1.25 V to VMID + 1.25 V (VDD = 5 V ± 10%).
The range of values of VMID that can be applied depends on the
value of VDD. For VDD = 3 V ± 10%, the range of values that can
be applied to VMID is from 1.0 V to VDD 1.0 V and is 1.25 V to
ranges of VMID and the input span for various values of VDD.
Figure 7. Typical Connection Diagram
Figure 9 illustrates the input signal range available with various
values of VMID.
ADC TRANSFER FUNCTION
The output coding of the AD7829-1 is straight binary. The
designed code transitions occur at successive integer LSB values
(that is, 1 LSB, 2 LSBs, and so on). The LSB size is equal to
VREF/256 (VDD = 5 V), or the LSB size is equal to (0.8 VREF)/256
(VDD = 3 V). The ideal transfer characteristic for the AD7829-1
is shown in
Table 5.
VMID
Internal
VMID Ext
Minimum
VMID Ext
Maximum
VDD
VIN Span
5.5
1.25
4.25
3.0 to 5.5
1.25
0 to 2.5
11111111
111...110
111...000
10000000
000...111
000...010
00000000
(VDD = 5V)
1LSB = VREF/256
(VDD = 3V)
1LSB = 0.8VREF/256
000...001
AD
C
CO
DE
1LSB
VMID
(VDD = 5V) VMID – 1.25V
(VDD = 3V) VMID – 1V
VMID + 1.25V – 1LSB
VMID + 1V – 1LSB
ANALOG INPUT VOLTAGE
0
61
79
-00
9
Figure 8. Transfer Characteristic
5.0
1.25
3.75
2.5 to 5.0
1.25
0 to 2.5
4.5
1.25
3.25
2.0 to 4.5
1.25
0 to 2.5
3.3
1.00
2.3
1.3 to 3.3
1.00
0 to 2.0
3.0
1.00
2.0
1.0 to 3.0
1.00
0 to 2.0
2.7
1.00
1.7
0.7 to 2.7
1.00
0 to 2.0
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