參數(shù)資料
型號： AD7792BRU
廠商： Analog Devices Inc
文件頁數(shù)： 24/33頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 3CH LP 16-TSSOP
標準包裝： 96
位數(shù)： 16
采樣率（每秒）： 500
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 2.5mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
輸入數(shù)目和類型： 3 個差分，單極；3 個差分，雙極
配用： EVAL-AD7792EBZ-ND - BOARD EVALUATION FOR AD7792
AD7792/AD7793
Rev. B | Page 29 of 32
TEMPERATURE MEASUREMENT USING AN RTD
To optimize a 3-wire RTD configuration, two identically
matched current sources are required. The AD7792/AD7793,
which contain two well-matched current sources, are ideally
suited to these applications. One possible 3-wire configuration
is shown in Figure 21. In this 3-wire configuration, the lead
resistances result in errors if only one current is used, as the
excitation current flows through RL1, developing a voltage error
between AIN1(+) and AIN1(–). In the scheme outlined, the
second RTD current source is used to compensate for the error
introduced by the excitation current flowing through RL1. The
second RTD current flows through RL2. Assuming RL1 and
RL2 are equal (the leads would normally be of the same
material and of equal length), and IOUT1 and IOUT2 match,
the error voltage across RL2 equals the error voltage across RL1,
and no error voltage is developed between AIN1(+) and
AIN1(–). Twice the voltage is developed across RL3 but,
because this is a common-mode voltage, it does not introduce
errors. The reference voltage for the AD7792/AD7793 is also
generated using one of these matched current sources. It is
developed using a precision resistor and applied to the
differential reference pins of the ADC. This scheme ensures that
the analog input voltage span remains ratiometric to the
reference voltage. Any errors in the analog input voltage due to
the temperature drift of the excitation current are compensated
by the variation of the reference voltage.
04
85
5-
0
13
DOUT/RDY
DIN
SCLK
CS
DVDD
SERIAL
INTERFACE
AND
CONTROL
LOGIC
AD7792/AD7793
IOUT1
REFIN(+)
REFIN(–)
AVDD
GND
BAND GAP
REFERENCE
INTERNAL
CLOCK
CLK
GND
AVDD
IN-AMP
BUF
REFIN(+) REFIN(–)
AIN1(+)
AIN1(–)
RREF
IOUT2
RL2
RL1
RTD
RL3
Σ-Δ
ADC
Figure 21. RTD Application Using the AD7792/AD7793
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