參數資料
型號: AD7792BRU
廠商: Analog Devices Inc
文件頁數: 21/33頁
文件大小: 0K
描述: IC ADC 16BIT 3CH LP 16-TSSOP
標準包裝: 96
位數: 16
采樣率(每秒): 500
數據接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 1
功率耗散(最大): 2.5mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 管件
輸入數目和類型: 3 個差分,單極;3 個差分,雙極
配用: EVAL-AD7792EBZ-ND - BOARD EVALUATION FOR AD7792
AD7792/AD7793
Rev. B | Page 27 of 32
The ground planes of the AD7792/AD7793 should be allowed
to run under the AD7792/AD7793 to prevent noise coupling.
The power supply lines to the AD7792/AD7793 should use as
wide a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line. Fast
switching signals such as clocks should be shielded with digital
ground to avoid radiating noise to other sections of the board,
and clock signals should never be run near the analog inputs.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A microstrip technique is by far the best, but it is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground planes,
and signals are placed on the solder side.
Good decoupling is important when using high resolution
ADCs. AVDD should be decoupled with 10 μF tantalum in
parallel with 0.1 μF capacitors to GND. DVDD should be
decoupled with 10 μF tantalum in parallel with 0.1 μF
capacitors to the system’s DGND plane, with the system’s
AGND to DGND connection being close to the
AD7792/AD7793.
To achieve the best from these decoupling components, they
should be placed as close as possible to the device, ideally right
up against the device. All logic chips should be decoupled with
0.1 μF ceramic capacitors to DGND.
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