參數(shù)資料
型號(hào)： AD7367BRUZ-RL7
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 11/29頁(yè)
文件大?。?/td> 0K
描述： IC ADC 14BIT SAR 1MSPS 24TSSOP
設(shè)計(jì)資源： Driving the AD7366/7 Bipolar SAR ADC in Low-Distortion DC-Coupled Appls (CN0042)
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 14
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 88.8mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 4 個(gè)單端，單極；4 個(gè)單端，雙極
AD7366/AD7367
Rev. D | Page 18 of 28
Unlike other bipolar ADCs, the AD7366/AD7367 do not have a
resistive analog input structure. On the AD7366/AD7367, the
bipolar analog signal is sampled directly onto the sampling
capacitor. This gives the AD7366/AD7367 high analog input
impedance. The analog input impedance can be calculated from
the following formula:
Z = 1/(fS × CS)
where:
fS is the sampling frequency.
CS is the sampling capacitor value.
CS depends on the analog input range chosen (see the Analog
Inputs section). When operating at 1 MSPS, the analog input
impedance is typically 260 kΩ for the ±10 V range. As the
sampling frequency is reduced, the analog input impedance
further increases. As the analog input impedance increases, the
current required to drive the analog input therefore decreases
(see Figure 7 for more information).
TYPICAL CONNECTION DIAGRAM
Figure 20 shows a typical connection diagram for the AD7366/
AD7367. In this configuration, the AGND pin is connected
to the analog ground plane of the system, and the DGND pin
is connected to the digital ground plane of the system. The
analog inputs on the AD7366/AD7367 accept bipolar single-
ended signals. The AD7366/AD7367 can operate with either
an internal or an external reference. In Figure 20, the AD7366/
AD7367 are configured to operate with the internal 2.5 V reference.
A 680 nF decoupling capacitor is required when operating with
the internal reference.
The AVCC and DVCC pins are connected to a 5 V supply voltage.
The VDD and VSS are the dual supplies for the high voltage analog
input structures. The voltage on these pins must be equal to or
greater than ±11.5 V (see Table 7 for more information). The
VDRIVE pin is connected to the supply voltage of the microprocessor.
The voltage applied to the VDRIVE input controls the voltage of
the serial interface. VDRIVE can be set to 3 V or 5 V.
AD7366/
AD7367
M
IC
R
OC
ON
TR
OLLE
R
/
MI
C
R
O
PR
O
C
ESSO
R
CS
VDRIVE
10F
0.1F
+
+3V OR +5V SUPPLY
+11.5V TO +16.5V
SUPPLY
–16.5V TO –11.5V
SUPPLY
+5V SUPPLY
DVCC AVCC
BUSY
CNVST
REFSEL
VDRIVE
DCAPA
DCAPB
ADDR
ANALOG INPUTS ±10V,
±5V, AND 0V TO +10V
680nF
SCLK
DOUTA
DOUTB
DGND
AGND
VSS
VB1
VB2
VA1
VDD
VA2
10F
0.1F
+
0.1F
+
10F
+
0.1F
+
SERIAL
INTERFACE
10F
+
0.1F
+
RANGE1
RANGE0
06703-
022
Figure 20. Typical Connection Diagram Using Internal Reference
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