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參數(shù)資料
| 型號： | AD7291BCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC I2C/SRL 22.22K 20LFCSP |
| 標(biāo)準包裝： | 1,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 22.22k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 12.6mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 20-LFCSP-WQ（4x4） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
| 配用： | EVAL-AD7291SDZ-ND - BOARD EVAL FOR AD7291 |
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AD7291
Data Sheet
Rev. B | Page 24 of 28
MODES OF OPERATION
When supplies are first applied to the AD7291, the ADC
powers up in partial power-down mode and normally remains
in this partial power-down state while not converting. Once
the master addresses the AD7291, it exits partial power-down.
There are two methods of initiating a conversion on the
AD7291: command mode and autocycle mode.
COMMAND MODE
In command mode, the AD7291 converts on demand on either
a single channel or a sequence of channels. Writing in the
command register puts the part into command mode. This is
the default mode of operation and allows a conversion to be
automatically selected any time a write operation occurs to the
command register. To enter this mode, the required combina-
tion of channels is written into the command register (Register
0x00). Following the write operation, the AD7291 must be
addressed again to indicate that a read operation is required.
The read then takes place from the voltage or temperature
conversion result register. For the first conversion to occur,
the address pointer written to the AD7291 must point to the
voltage conversion result register or TSENSE conversion result
register. The conversion is completed while the first four
channel address bits are read. The next conversion in the
sequence takes place once the next read from the result
register is initiated. When operating the device in fast mode, the
acquisition and conversion times combined take approximately
4.45 μs (1.25 μs acquisition time plus 3.2 μs conversion time).
When in command mode, the part cycles through the selected
channels from the lowest selected channel in the sequence to
the next lowest until all the channels in the sequence are
converted.
To exit the command mode, the master should not acknowledge
the final byte of data. This stops the AD7291 transmitting,
allowing the master to assert a stop condition on the bus. On
the receipt of a stop condition, the AD7291 stops converting
and enters partial power-down mode, but the content of the
command register is preserved. Once the part is readdressed
and a read is initiated from the voltage conversion register, the
AD7291 begins converting on the previously selected sequence
of channels. The conversion sequence starts converting the
first selected channel in the sequence; that is, if Channel 1,
Channel 2, and Channel 3 are selected and a stop condition
occurs after the Channel 1 result is read, on resumption of
conversions, Channel 1 is reconverted and the conversion
sequence continues.
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