參數(shù)資料
型號: AD6600ASTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 1/24頁
文件大?。?/td> 0K
描述: IC ADC DUAL W/RSSI 44-LQFP T/R
標(biāo)準(zhǔn)包裝: 1,500
位數(shù): 11
采樣率(每秒): 20M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 976mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-LQFP(10x10)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個差分,雙極
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD6600
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Dual IF Inputs, 70 MHz–250 MHz
Diversity or Two Independent IF Signals
Separate Attenuation Paths
Oversample RF Channels
20 MSPS on a Single Carrier
10 MSPS/Channel in Diversity Mode
Total Signal Range 90+ dB
30 dB from Automatic Gain-Ranging (AGC)
60 dB from A/D Converter
Range >100 dB After Processing Gain
Digital Outputs
11-Bit ADC Word
3-Bit RSSI Word
2
Clock, A/B Indicator
Single 5 V Power Supply
Output DVCC 3.3 V or 5 V
775 mW Power Dissipation
APPLICATIONS
Communications Receivers
PCS/Cellular Base Stations
GSM, CDMA, TDMA
Wireless Local Loop, Fixed Access
PRODUCT DESCRIPTION
The AD6600 mixed-signal receiver chip directly samples signals
at analog input frequencies up to 250 MHz. The device includes
two input channels, each with 1 GHz input amplifiers and
30 dB of automatic gain-ranging circuitry. Both channels are
sampled with a 450 MHz track-and-hold followed by an 11-bit,
20 MSPS analog-to-digital converter. Digital RSSI outputs, an
A/B channel indicator, a 2
× Clock output, references, and con-
trol circuitry are all on-chip. Digital output signals are two’s
complement, CMOS-compatible and interface directly to
3.3 V or 5 V digital processing chips.
The primary use for the dual analog input structure is sampling
both antennas in a two-antenna diversity receiver. However,
Channels A and B may also be used to sample two independent
IF signals. Diversity, or dual-channel mode, is limited to 10 MSPS
per channel. In single-channel mode, the full clock rate of
20 MSPS may be applied to a single carrier.
The AD6600 may be used as a stand-alone sampling chip, or it
may be combined with the AD6620 Digital Receive Signal Pro-
cessor. The AD6620 provides 10 dB–25 dB of additional pro-
cessing gain before passing data to a fixed- or floating-point DSP.
Driving the AD6600 is simplified by using the AD6630 differen-
tial IF amplifier. The AD6630 is easily matched to inexpensive
SAW filters from 70 MHz to 250 MHz.
Designed specifically for cellular/PCS receivers, the AD6600
supports GSM, IS-136, CDMA and Wireless LANs, as well as
proprietary air interfaces used in WLL/fixed-access systems.
Units are available in plastic, surface-mount packages (44-lead
LQFP) and specified over the industrial temperature range
(–40
°C to +85°C).
Dual Channel, Gain-Ranging
ADC with RSSI
GAIN
A/D
CONVERTER
TIMING
ENCODE
SELECT GAIN
+12, +18dB
ENCODE
FLT
NOISE FILTER
RESONANT
PORT
630
RSSI
3
TWO'S
COMPLEMENT
11
AB_OUT
D10–D0
RSSI [2:0]
CLK2
DVCC
ENC
GND
AVCC
B_SEL
A_SEL
ANALOG
MUX
GAIN
RSSI
3
0dB, –12dB, –24dB
ATTEN
0dB, –12dB, –24dB
DETECT
PEAK
SET
RSSI
AIN
BIN
AD6600
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