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參數(shù)資料
| 型號(hào)： | AD5757ACPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 15 us SETTLING TIME, 16-BIT DAC, QCC64 |
| 封裝： | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 |
| 文件頁數(shù)： | 26/44頁 |
| 文件大?。?/td> | 1122K |
| 代理商： | AD5757ACPZ |
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AD5757
Rev. A | Page 32 of 44
Status Register
The status register is a read only register. This register contains
any fault information as a well as a ramp active bit and a user
toggle bit. When the STATREAD bit in the main control
register is set, the status register contents can be read back on
the SDO pin during every write sequence. Alternatively, if the
STATREAD bit is not set, the status register can be read using
the normal readback operation.
Table 28. Decoding the Status Register
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC-
DCD
DC-
DCC
DC-
DCB
DC-
DCA
User
toggle
PEC
error
Ramp
active
Over
TEMP
IOUT_D
fault
IOUT_C
fault
IOUT_B
fault
IOUT_A
fault
1 X = don’t care.
Table 29. Status Register Options
Bit
Description
DC-DCD
This bit is set on Channel D if the dc-to-dc converter cannot maintain compliance (it may be reaching its VMAX
voltage). In this case, the IOUT_D fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCC
This bit is set on Channel C if the dc-to-dc converter cannot maintain compliance (it may be reaching its VMAX
voltage). In this case, the IOUT_C fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCB
This bit is set on Channel B if the dc-to-dc converter cannot maintain compliance (it may be reaching its VMAX
voltage). In this case, the IOUT_B fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
DC-DCA
This bit is set on Channel A if the dc-to-dc converter cannot maintain compliance (it may be reaching its VMAX
voltage). In this case, the IOUT_A fault bit is also set. See the DC-to-DC Converter VMAX Functionality section for more
information on this bit’s operation under this condition.
User toggle
User toggle bit. This bit is set or cleared via the software register. This can be used to verify data communications if
needed.
PEC Error
Denotes a PEC error on the last data-word received over the SPI interface.
Ramp Active
This bit is set while any one of the output channels is slewing (slew rate control is enabled on at least one channel).
Over TEMP
This bit is set if the AD5757 core temperature exceeds approximately 150°C.
IOUT_D Fault
This bit is set if a fault is detected on the IOUT_D pin.
IOUT_C Fault
This bit is set if a fault is detected on the IOUT_C pin.
IOUT_B Fault
This bit is set if a fault is detected on the IOUT_B pin.
IOUT_A Fault
This bit is set if a fault is detected on the IOUT_A pin.
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| AD5757ACPZ-REEL7 | 功能描述:IC DAC 16BIT QUAD IOUT 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD5757X | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
| AD575JD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575JN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
| AD575KD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 10-Bit |
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