參數(shù)資料
型號： AD5735ACPZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 29/48頁
文件大?。?/td> 0K
描述： IC DAC QUAD VOLT CUR 64LFCSP
標準包裝： 750
設置時間： 18µs
位數(shù)： 12
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉換器數(shù)目： 4
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應商設備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電流，4 電壓
采樣率（每秒）： *
Data Sheet
AD5735
Rev. C | Page 35 of 48
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 23 and Table 24.
Table 23. Programming the DAC Control Register
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
X1
INT_ENABLE CLR_EN OUTEN
RSET
DC_DC
OVRNG R2
R1
R0
1 X = don’t care.
Table 24. DAC Control Register Bit Descriptions
Bit Name
Description
INT_ENABLE
Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. This bit applies to individual
channels only; it does not enable the output. After setting this bit, it is recommended that a >200 s delay be observed
before enabling the output to reduce the output enable glitch. See Figure 29 and Figure 46 for plots of this glitch.
CLR_EN
Per-channel clear enable bit. This bit specifies whether the selected channel is cleared when the CLEAR pin is activated.
0 = channel is not cleared when the part is cleared (default).
1 = channel is cleared when the part is cleared.
OUTEN
Enables or disables the selected output channel.
0 = channel disabled (default).
1 = channel enabled.
RSET
Selects the internal current sense resistor or an external current sense resistor for the selected DAC channel.
0 = external resistor selected (default).
1 = internal resistor selected.
DC_DC
Powers up or powers down the dc-to-dc converter on the selected channel. All dc-to-dc converters can be powered up
simultaneously using the DCDC_ALL bit in the main control register. To power down the dc-to-dc converter, the OUTEN
and INT_ENABLE bits must also be set to 0.
0 = dc-to-dc converter is powered down (default).
1 = dc-to-dc converter is powered up.
OVRNG
Enables 20% overrange on the voltage output channel only. No current output overrange is available.
0 = overrange disabled (default).
1 = overrange enabled.
R2, R1, R0
Selects the output range to be enabled.
R2
R1
R0
Output Range Selected
0
0 V to 5 V voltage range (default)
0
1
0 V to 10 V voltage range
0
1
0
±5 V voltage range
0
1
±10 V voltage range
1
0
4 mA to 20 mA current range
1
0
1
0 mA to 20 mA current range
1
0
0 mA to 24 mA current range
相關PDF資料
PDF描述
AD5737ACPZ IC DAC QUAD 12BIT CUR 64-LFCSP
AD573JD IC ADC 10BIT SAR REG 20-CDIP
AD5744RCSUZ-REEL7 IC DAC QUAD 14BIT 1LSB 32TQFP
AD574AKPZ-REEL IC ADC 12BIT W/REF/CLK 28-PLCC
AD5752AREZ IC DAC DUAL 16BIT SERIAL 24TSSOP
相關代理商/技術參數(shù)
參數(shù)描述
AD5737 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity
AD5737_12 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output
AD5737ACPZ 功能描述:IC DAC QUAD 12BIT CUR 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND
AD5737ACPZ-RL7 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output
AD5737X 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*