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參數(shù)資料
| 型號： | AD5735ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC QUAD VOLT CUR 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 設(shè)置時間： | 18µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，4 電壓 |
| 采樣率（每秒）： | * |
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AD5735
Data Sheet
Rev. C | Page 30 of 48
REGISTERS
Table 8. Data Registers for the AD5735
Register
Description
DAC Data Registers
The four DAC data registers (one register per DAC channel) are used to write a DAC code to each DAC
channel. The DAC data bits are D15 to D4.
Gain Registers
The four gain registers (one register per DAC channel) are used to program the gain trim on a per-channel
basis. The gain data bits are D15 to D4.
Offset Registers
The four offset registers (one register per DAC channel) are used to program the offset trim on a per-channel
basis. The offset data bits are D15 to D4.
Clear Code Registers
The four clear code registers (one register per DAC channel) are used to program the clear code on a per-
channel basis. The clear code data bits are D15 to D4.
Table 9. Control Registers for the AD5735
Register
Description
Main Control Register
The main control register is used to configure functions for the entire part. These functions include the
following: enabling status readback during a write; enabling the output on all four DAC channels simulta-
neously; power-on of the dc-to-dc converter on all four DAC channels simultaneously; and enabling and
configuring the watchdog timer. For more information, see the Main Control Register section.
DAC Control Registers
The four DAC control registers (one register per DAC channel) are used to configure the following functions
on a per-channel basis: output range (for example, 4 mA to 20 mA or 0 V to 10 V); selection of the internal
current sense resistor or an external current sense resistor; enabling/disabling the use of a clear code;
enabling/disabling overrange on a voltage channel; enabling/disabling the internal circuitry (dc-to-dc
converter, DAC, and internal amplifiers); power-on/power-off of the dc-to-dc converter; and enabling/
disabling the output channel.
Software Register
The software register is used to perform a reset, to toggle the user bit in the status register, and, as part of
the watchdog timer feature, to verify correct data communication operation.
DC-to-DC Control Register
The dc-to-dc control register is used to set the control parameters for the dc-to-dc converter: maximum
output voltage, phase, and switching frequency. This register is also used to select the internal compensa-
tion resistor or an external compensation resistor for the dc-to-dc converter.
Slew Rate Control Registers
The four slew rate control registers (one register per DAC channel) are used to program the slew rate of
the DAC output.
Table 10. Readback Register for the AD5735
Register
Description
Status Register
The status register contains any fault information, as well as a user toggle bit.
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| AD5737 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
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| AD5737ACPZ | 功能描述:IC DAC QUAD 12BIT CUR 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD5737ACPZ-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output |
| AD5737X | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity |
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