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AD5735
Data Sheet
Rev. C | Page 28 of 48
THEORY OF OPERATION
voltage output converter designed to meet the requirements of
industrial process control applications. It provides a high precision,
fully integrated, low cost, single-chip solution for generating
current loop and unipolar/bipolar voltage outputs.
The current ranges available are 0 mA to 20 mA, 4 mA to 20 mA,
and 0 mA to 24 mA. The voltage ranges available are 0 V to 5 V,
±5 V, 0 V to 10 V, and ±10 V. The current and voltage outputs
are available on separate pins, and only one output is active at
any one time. The output configuration is user-selectable via the
DAC control register.
On-chip dynamic power control minimizes package power
section).
DAC ARCHITECTURE
The DAC core architecture of the
AD5735 consists of two
matched DAC sections. A simplified circuit diagram is shown
to drive 15 switches, E1 to E15. Each switch connects one of
15 matched resistors either to ground or to the reference buffer
output. The remaining eight bits of the data-word drive Switch S0
to Switch S7 of an 8-bit voltage mode R-2R ladder network.
8-BIT R-2R LADDER
FOUR MSBs DECODED INTO
15 EQUAL SEGMENTS
2R
S0
S1
S7
E1
E2
E15
VOUT
2R
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069
Figure 69. DAC Ladder Structure
The voltage output from the DAC core can be
Buffered and scaled to output a software selectable
Converted to a current, which is then mirrored to the
supply rail so that the application sees only a current
Both the voltage and current outputs are supplied by VBOOST_x.
The current and voltage are output on separate pins and cannot
be output simultaneously. The current and voltage output pins
RANGE
SCALING
12-BIT
DAC
VOUT_X SHORT FAULT
+VSENSE_X
–VSENSE_X
VOUT_X
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070
Figure 70. Voltage Output
12-BIT
DAC
VBOOST_x
R2
T2
T1
R3
IOUT_x
RSET
A1
A2
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071
Figure 71. Voltage-to-Current Conversion Circuitry
Voltage Output Amplifier
The voltage output amplifier is capable of generating both
unipolar and bipolar output voltages. It is capable of driving a
load of 1 k in parallel with 1 F (with an external compen-
sation capacitor) to AGND. The source and sink capabilities
of the output amplifier are shown in
Figure 22. The slew rate is
1.9 V/s with a full-scale settling time of 18 s max (10 V step).
If remote sensing of the load is not required, connect +VSENSE_x
directly to VOUT_x, and connect VSENSE_x directly to AGND.
VSENSE_x must stay within ±3.0 V of AGND for specified opera-
tion. The difference in voltage between +VSENSE_x and VOUT_x
should be added directly to the headroom requirement.
Driving Large Capacitive Loads
The voltage output amplifier is capable of driving capacitive
loads of up to 2 F with the addition of a 220 pF, nonpolarized
compensation capacitor on each channel. The 220 pF capacitor
is connected between the COMPLV_x pin and the VOUT_x pin.
Care should be taken to choose an appropriate value of com-
pensation capacitor. This capacitor, while allowing th
e AD5735to drive higher capacitive loads and reduce overshoot, increases
the settling time of the part and, therefore, affects the bandwidth
of the system. Without the compensation capacitor, capacitive
loads of up to 10 nF can be driven.
Reference Buffers
The
AD5735 can operate with either an external or internal
reference. The reference input requires a 5 V reference for
specified performance. This input voltage is then buffered
before it is applied to the DAC.